mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 00:48:52 +09:00
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: SMDK6400: fix the compiler error imx27lite: Remove local config.mk mx31ads: Fix environment location on flash imx31_litekit: Remove local config.mk mx31litekit: Fix boot with the new relocation scheme. mx31ads: Use the new relocation scheme
This commit is contained in:
commit
9571865e0d
@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x87f00000
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@ -28,15 +28,21 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init (void)
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int dram_init(void)
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{
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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return 0;
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return 0;
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}
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}
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int board_init (void)
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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}
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int board_early_init_f(void)
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{
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{
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int i;
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int i;
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@ -94,6 +100,11 @@ int board_init (void)
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readb(CS4_BASE + 8);
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readb(CS4_BASE + 8);
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readb(CS4_BASE + 7);
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readb(CS4_BASE + 7);
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_arch_number = MACH_TYPE_MX31ADS; /* board id for linux */
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gd->bd->bi_arch_number = MACH_TYPE_MX31ADS; /* board id for linux */
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gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
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gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
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@ -48,23 +48,47 @@ SECTIONS
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*(.text)
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*(.text)
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}
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}
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. = ALIGN(4);
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.rodata : { *(.rodata) }
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. = ALIGN(4);
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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.data : {
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*(.data)
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}
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. = ALIGN(4);
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. = ALIGN(4);
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.data : { *(.data) }
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. = ALIGN(4);
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.got : { *(.got) }
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. = .;
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__u_boot_cmd_start = .;
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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.u_boot_cmd : { *(.u_boot_cmd) }
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__u_boot_cmd_end = .;
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__u_boot_cmd_end = .;
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. = ALIGN(4);
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. = ALIGN(4);
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.rel.dyn : {
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__rel_dyn_start = .;
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*(.rel*)
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__rel_dyn_end = .;
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}
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.dynsym : {
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__dynsym_start = .;
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*(.dynsym)
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}
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_end = .;
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.bss __rel_dyn_start (OVERLAY) : {
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__bss_start = .;
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__bss_start = .;
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.bss : { *(.bss) . = ALIGN(4); }
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*(.bss)
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. = ALIGN(4);
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__bss_end__ = .;
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__bss_end__ = .;
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}
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/DISCARD/ : { *(.bss*) }
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/DISCARD/ : { *(.dynstr*) }
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/DISCARD/ : { *(.dynsym*) }
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/DISCARD/ : { *(.dynamic*) }
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/DISCARD/ : { *(.hash*) }
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/DISCARD/ : { *(.plt*) }
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/DISCARD/ : { *(.interp*) }
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/DISCARD/ : { *(.gnu*) }
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}
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}
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@ -1,5 +0,0 @@
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# with relocation CONFIG_SYS_TEXT_BASE can be anything, and making it 0
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# makes relative and absolute relocation fixups interchangeable.
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#CONFIG_SYS_TEXT_BASE = 0
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CONFIG_SYS_TEXT_BASE = 0xc0000000
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@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0xa0000000
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@ -29,21 +29,21 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init (void)
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int dram_init(void)
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{
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{
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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return 0;
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return 0;
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}
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}
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void
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void dram_init_banksize(void)
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dram_init_banksize (void)
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{
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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}
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}
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int board_init (void)
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int board_early_init_f(void)
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{
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{
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__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
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__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
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__REG(CSCR_L(0)) = 0xa0330d01;
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__REG(CSCR_L(0)) = 0xa0330d01;
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@ -71,6 +71,11 @@ int board_init (void)
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/* start SPI2 clock */
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/* start SPI2 clock */
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__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
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__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_arch_number = MACH_TYPE_MX31LITE; /* board id for linux */
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gd->bd->bi_arch_number = MACH_TYPE_MX31LITE; /* board id for linux */
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gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
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gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
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@ -67,6 +67,8 @@ SECTIONS
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*(.dynsym)
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*(.dynsym)
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}
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}
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_end = .;
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.bss __rel_dyn_start (OVERLAY) : {
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.bss __rel_dyn_start (OVERLAY) : {
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__bss_start = .;
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__bss_start = .;
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*(.bss)
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*(.bss)
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@ -34,6 +34,8 @@
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_SYS_TEXT_BASE 0xc0000000
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_INITRD_TAG 1
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@ -39,6 +39,8 @@
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SYS_TEXT_BASE 0xa0000000
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/* Temporarily disabled */
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/* Temporarily disabled */
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#if 0
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#if 0
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#define CONFIG_OF_LIBFDT 1
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#define CONFIG_OF_LIBFDT 1
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@ -145,6 +147,7 @@
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CSD0_BASE
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#define PHYS_SDRAM_1 CSD0_BASE
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_SYS_SDRAM_BASE CSD0_BASE
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#define CONFIG_SYS_SDRAM_BASE CSD0_BASE
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SYS_TEXT_BASE 0xA0000000
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/*
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/*
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* Disabled for now due to build problems under Debian and a significant increase
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* Disabled for now due to build problems under Debian and a significant increase
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* in the final file size: 144260 vs. 109536 Bytes.
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* in the final file size: 144260 vs. 109536 Bytes.
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@ -160,6 +162,15 @@
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CSD0_BASE
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#define PHYS_SDRAM_1 CSD0_BASE
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_GBL_DATA_OFFSET)
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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* FLASH and environment organization
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@ -171,18 +182,14 @@
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SECT_SIZE (32 * 1024)
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
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/* Address and size of Redundant Environment Sector */
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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/* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end.
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* The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors,
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* if we put environment next to it, we will have to occupy 128KiB for it.
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* Putting it at the top of flash we use only 32KiB. */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_ENV_SECT_SIZE)
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* CFI FLASH driver setup
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* CFI FLASH driver setup
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