From 94276eb0a7a35b9e8c053d589ae225b0f017a237 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 3 Oct 2007 14:14:58 +0200 Subject: [PATCH] ppc4xx: Add a comment for 405EX PCIe endpoint configuration Signed-off-by: Stefan Roese --- cpu/ppc4xx/4xx_pcie.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c index 2bc9638f41..177e2ad2e7 100644 --- a/cpu/ppc4xx/4xx_pcie.c +++ b/cpu/ppc4xx/4xx_pcie.c @@ -431,6 +431,12 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport) { u32 val; + /* + * test-only: + * This needs some testing and perhaps changes for + * endpoint configuration. Probably no PHY reset at all, etc. + * sr, 2007-10-03 + */ if (rootport) val = 0x00401000; else