mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
board: stm32mp1: Add Avenger96 board support
Add support for Avenger96 board from Arrow Electronics based on STM32MP157
MPU. This board is one of the Consumer Edition (CE) boards of the 96Boards
family and has the following features:
SoC: STM32MP157AAC
PMIC: STPMIC1A
RAM: 1024 Mbyte @ 533MHz
Storage: eMMC v4.51: 8 Gbyte
microSD Socket: UHS-1 v3.01
Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
Bluetooth®v4.2 (BR/EDR/BLE)
USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
LED: 4x User LED, 1x WiFi LED, 1x BT LED
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/avenger96/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Manivannan Sadhasivam
Patrice Chotard
parent
89e4dd57bd
commit
93ffa2ba80
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@ -750,6 +750,7 @@ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
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dtb-$(CONFIG_TARGET_STM32MP1) += \
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stm32mp157a-dk1.dtb \
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stm32mp157a-avenger96.dtb \
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stm32mp157c-dk2.dtb \
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stm32mp157c-ed1.dtb \
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stm32mp157c-ev1.dtb
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191
arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
Normal file
191
arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
Normal file
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@ -0,0 +1,191 @@
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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Copyright : STMicroelectronics 2018
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*
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* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
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* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*/
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#include <dt-bindings/clock/stm32mp1-clksrc.h>
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#include "stm32mp157-u-boot.dtsi"
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#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
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/ {
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aliases {
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mmc0 = &sdmmc1;
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mmc1 = &sdmmc2;
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usb0 = &usbotg_hs;
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};
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config {
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u-boot,boot-led = "led1";
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u-boot,error-led = "led4";
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};
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};
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&i2c4 {
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u-boot,dm-pre-reloc;
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};
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&i2c4_pins_a {
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u-boot,dm-pre-reloc;
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pins {
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u-boot,dm-pre-reloc;
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};
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};
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&pmic {
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u-boot,dm-pre-reloc;
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};
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&rcc {
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st,clksrc = <
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CLK_MPU_PLL1P
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CLK_AXI_PLL2P
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CLK_MCU_PLL3P
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CLK_PLL12_HSE
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CLK_PLL3_HSE
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CLK_PLL4_HSE
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CLK_RTC_LSE
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CLK_MCO1_DISABLED
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CLK_MCO2_DISABLED
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>;
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st,clkdiv = <
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1 /*MPU*/
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0 /*AXI*/
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0 /*MCU*/
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1 /*APB1*/
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1 /*APB2*/
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1 /*APB3*/
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1 /*APB4*/
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2 /*APB5*/
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23 /*RTC*/
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0 /*MCO1*/
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0 /*MCO2*/
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>;
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st,pkcs = <
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CLK_CKPER_HSE
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CLK_FMC_ACLK
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CLK_QSPI_ACLK
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CLK_ETH_DISABLED
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CLK_SDMMC12_PLL4P
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CLK_DSI_DSIPLL
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CLK_STGEN_HSE
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CLK_USBPHY_HSE
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CLK_SPI2S1_PLL3Q
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CLK_SPI2S23_PLL3Q
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CLK_SPI45_HSI
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CLK_SPI6_HSI
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CLK_I2C46_HSI
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CLK_SDMMC3_PLL4P
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CLK_USBO_USBPHY
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CLK_ADC_CKPER
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CLK_CEC_LSE
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CLK_I2C12_HSI
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CLK_I2C35_HSI
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CLK_UART1_HSI
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CLK_UART24_HSI
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CLK_UART35_HSI
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CLK_UART6_HSI
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CLK_UART78_HSI
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CLK_SPDIF_PLL4P
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CLK_FDCAN_PLL4Q
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CLK_SAI1_PLL3Q
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CLK_SAI2_PLL3Q
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CLK_SAI3_PLL3Q
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CLK_SAI4_PLL3Q
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CLK_RNG1_LSI
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CLK_RNG2_LSI
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CLK_LPTIM1_PCLK1
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CLK_LPTIM23_PCLK3
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CLK_LPTIM45_LSE
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>;
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/* VCO = 1300.0 MHz => P = 650 (CPU) */
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pll1: st,pll@0 {
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cfg = < 2 80 0 0 0 PQR(1,0,0) >;
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frac = < 0x800 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
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pll2: st,pll@1 {
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cfg = < 2 65 1 0 0 PQR(1,1,1) >;
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frac = < 0x1400 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
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pll3: st,pll@2 {
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cfg = < 1 33 1 16 36 PQR(1,1,1) >;
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frac = < 0x1a04 >;
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u-boot,dm-pre-reloc;
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};
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/* VCO = 480.0 MHz => P = 120, Q = 40, R = 96 */
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pll4: st,pll@3 {
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cfg = < 1 39 3 11 4 PQR(1,1,1) >;
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u-boot,dm-pre-reloc;
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};
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};
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&sdmmc1 {
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u-boot,dm-spl;
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};
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&sdmmc1_b4_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&sdmmc1_dir_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&sdmmc2 {
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u-boot,dm-spl;
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};
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&sdmmc2_b4_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&sdmmc2_d47_pins_a {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&uart4 {
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u-boot,dm-pre-reloc;
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};
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&uart4_pins_b {
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u-boot,dm-pre-reloc;
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pins1 {
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u-boot,dm-pre-reloc;
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};
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pins2 {
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u-boot,dm-pre-reloc;
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};
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};
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&usbotg_hs {
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u-boot,force-b-session-valid;
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hnp-srp-disable;
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};
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&v3v3 {
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regulator-always-on;
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};
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362
arch/arm/dts/stm32mp157a-avenger96.dts
Normal file
362
arch/arm/dts/stm32mp157a-avenger96.dts
Normal file
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@ -0,0 +1,362 @@
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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
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*
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* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
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* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*/
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/dts-v1/;
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#include "stm32mp157c.dtsi"
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#include "stm32mp157-pinctrl.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/mfd/st,stpmic1.h>
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/ {
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model = "Arrow Electronics STM32MP157A Avenger96 board";
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compatible = "st,stm32mp157a-avenger96", "st,stm32mp157";
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aliases {
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ethernet0 = ðernet0;
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serial0 = &uart4;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@c0000000 {
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reg = <0xc0000000 0x40000000>;
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};
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led {
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compatible = "gpio-leds";
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led1 {
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label = "green:user1";
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gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led2 {
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label = "green:user2";
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gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led3 {
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label = "green:user3";
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gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc1";
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default-state = "off";
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};
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led4 {
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label = "green:user3";
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gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "none";
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default-state = "off";
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panic-indicator;
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};
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led5 {
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label = "yellow:wifi";
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gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0tx";
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default-state = "off";
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};
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led6 {
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label = "blue:bt";
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gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "bluetooth-power";
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default-state = "off";
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};
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};
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};
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ðernet0 {
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status = "okay";
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pinctrl-0 = <ðernet0_rgmii_pins_a>;
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pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
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pinctrl-names = "default", "sleep";
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phy-mode = "rgmii";
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max-speed = <1000>;
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phy-handle = <&phy0>;
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@7 {
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reg = <7>;
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};
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins_b>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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/delete-property/dmas;
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/delete-property/dma-names;
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins_b>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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/delete-property/dmas;
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/delete-property/dma-names;
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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/delete-property/dmas;
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/delete-property/dma-names;
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pmic: stpmic@33 {
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compatible = "st,stpmic1";
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reg = <0x33>;
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interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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status = "okay";
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st,main-control-register = <0x04>;
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st,vin-control-register = <0xc0>;
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st,usb-control-register = <0x30>;
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regulators {
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compatible = "st,stpmic1-regulators";
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ldo1-supply = <&v3v3>;
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ldo2-supply = <&v3v3>;
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ldo3-supply = <&vdd_ddr>;
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ldo5-supply = <&v3v3>;
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ldo6-supply = <&v3v3>;
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pwr_sw1-supply = <&bst_out>;
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pwr_sw2-supply = <&bst_out>;
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vddcore: buck1 {
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regulator-name = "vddcore";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <2>;
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regulator-over-current-protection;
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};
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vdd_ddr: buck2 {
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regulator-name = "vdd_ddr";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <2>;
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regulator-over-current-protection;
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};
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vdd: buck3 {
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regulator-name = "vdd";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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st,mask_reset;
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regulator-initial-mode = <8>;
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regulator-over-current-protection;
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};
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v3v3: buck4 {
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regulator-name = "v3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-over-current-protection;
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regulator-initial-mode = <8>;
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};
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vdda: ldo1 {
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regulator-name = "vdda";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO1 0>;
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interrupt-parent = <&pmic>;
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};
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v2v8: ldo2 {
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regulator-name = "v2v8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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interrupts = <IT_CURLIM_LDO2 0>;
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interrupt-parent = <&pmic>;
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};
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vtt_ddr: ldo3 {
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regulator-name = "vtt_ddr";
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regulator-min-microvolt = <0000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-over-current-protection;
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};
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vdd_usb: ldo4 {
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regulator-name = "vdd_usb";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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interrupts = <IT_CURLIM_LDO4 0>;
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interrupt-parent = <&pmic>;
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};
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vdd_sd: ldo5 {
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regulator-name = "vdd_sd";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO5 0>;
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interrupt-parent = <&pmic>;
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regulator-boot-on;
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};
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v1v8: ldo6 {
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regulator-name = "v1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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interrupts = <IT_CURLIM_LDO6 0>;
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interrupt-parent = <&pmic>;
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};
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vref_ddr: vref_ddr {
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regulator-name = "vref_ddr";
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regulator-always-on;
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regulator-over-current-protection;
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};
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bst_out: boost {
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regulator-name = "bst_out";
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interrupts = <IT_OCP_BOOST 0>;
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interrupt-parent = <&pmic>;
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};
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vbus_otg: pwr_sw1 {
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regulator-name = "vbus_otg";
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interrupts = <IT_OCP_OTG 0>;
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interrupt-parent = <&pmic>;
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regulator-active-discharge;
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};
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vbus_sw: pwr_sw2 {
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regulator-name = "vbus_sw";
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interrupts = <IT_OCP_SWOUT 0>;
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interrupt-parent = <&pmic>;
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regulator-active-discharge;
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};
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};
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onkey {
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compatible = "st,stpmic1-onkey";
|
||||
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
|
||||
interrupt-names = "onkey-falling", "onkey-rising";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog {
|
||||
compatible = "st,stpmic1-wdt";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&iwdg2 {
|
||||
timeout-sec = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwr {
|
||||
pwr-supply = <&vdd>;
|
||||
};
|
||||
|
||||
&rng1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
|
||||
broken-cd;
|
||||
st,sig-dir;
|
||||
st,neg-edge;
|
||||
st,use-ckin;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vdd_sd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
st,neg-edge;
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
mmc-ddr-3_3v;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi2_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins_b>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh_ehci {
|
||||
phys = <&usbphyc_port0>;
|
||||
phy-names = "usb";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg_hs {
|
||||
dr_mode = "peripheral";
|
||||
phys = <&usbphyc_port1 0>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc_port0 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
};
|
||||
|
||||
&usbphyc_port1 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
};
|
||||
|
|
@ -37,6 +37,7 @@ Currently the following boards are supported:
|
|||
+ stm32mp157c-ed1
|
||||
+ stm32mp157a-dk1
|
||||
+ stm32mp157c-dk2
|
||||
+ stm32mp157a-avenger96
|
||||
|
||||
3. Boot Sequences
|
||||
=================
|
||||
|
|
@ -84,6 +85,9 @@ the supported device trees for stm32mp157 are:
|
|||
+ dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel
|
||||
dts: stm32mp157c-dk2
|
||||
|
||||
+ avenger96: Avenger96 board from Arrow Electronics
|
||||
dts: stm32mp157a-avenger96
|
||||
|
||||
5. Build Procedure
|
||||
==================
|
||||
|
||||
|
|
@ -140,6 +144,11 @@ the supported device trees for stm32mp157 are:
|
|||
# make stm32mp15_basic_defconfig
|
||||
# make DEVICE_TREE=stm32mp157c-dk2 all
|
||||
|
||||
d) basic boot on avenger96
|
||||
# export KBUILD_OUTPUT=stm32mp15_basic
|
||||
# make stm32mp15_basic_defconfig
|
||||
# make DEVICE_TREE=stm32mp157a-avenger96 all
|
||||
|
||||
6. Output files
|
||||
|
||||
BootRom and TF-A expect binaries with STM32 image header
|
||||
|
|
@ -182,6 +191,20 @@ You can select the boot mode, on the board ed1 with the switch SW1
|
|||
SD-Card 1 1
|
||||
Recovery 0 0
|
||||
|
||||
- Boot mode of Avenger96 can be selected using switch S3
|
||||
|
||||
-----------------------------------
|
||||
Boot Mode BOOT2 BOOT1 BOOT0
|
||||
-----------------------------------
|
||||
Recovery 0 0 0
|
||||
NOR 0 0 1
|
||||
SD-Card 1 0 1
|
||||
eMMC 0 1 0
|
||||
NAND 0 1 1
|
||||
Reserved 1 0 0
|
||||
Recovery 1 1 0
|
||||
SD-Card 1 1 1
|
||||
|
||||
Recovery is a boot from serial link (UART/USB) and it is used with
|
||||
STM32CubeProgrammer tool to load executable in RAM and to update the flash
|
||||
devices available on the board (NOR/NAND/eMMC/SDCARD).
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user