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https://github.com/brain-hackers/u-boot-brain
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serial: uartlite: Move driver to DM
Enable SPL DM too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
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@ -13,6 +13,7 @@ config TARGET_MICROBLAZE_GENERIC
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select SUPPORT_SPL
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select SUPPORT_SPL
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select OF_CONTROL
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select OF_CONTROL
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select DM
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select DM
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select DM_SERIAL
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endchoice
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endchoice
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@ -1,5 +1,6 @@
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CONFIG_MICROBLAZE=y
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CONFIG_MICROBLAZE=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_DM=y
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CONFIG_TARGET_MICROBLAZE_GENERIC=y
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CONFIG_TARGET_MICROBLAZE_GENERIC=y
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CONFIG_SYS_TEXT_BASE=0x29000000
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CONFIG_SYS_TEXT_BASE=0x29000000
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CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
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CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
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@ -7,4 +8,5 @@ CONFIG_SPL=y
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CONFIG_SYS_PROMPT="U-Boot-mONStR> "
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CONFIG_SYS_PROMPT="U-Boot-mONStR> "
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_EMBED=y
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CONFIG_OF_EMBED=y
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13
doc/device-tree-bindings/serial/xilinx_uartlite.txt
Normal file
13
doc/device-tree-bindings/serial/xilinx_uartlite.txt
Normal file
@ -0,0 +1,13 @@
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Binding for Xilinx Uartlite Controller
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Required properties:
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- compatible : should be "xlnx,xps-uartlite-1.00.a", or "xlnx,opb-uartlite-1.00.b"
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- reg: Should contain UART controller registers location and length.
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- interrupts: Should contain UART controller interrupts.
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Example:
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serial@40600000 {
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compatible = "xlnx,xps-uartlite-1.00.a";
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interrupts = <1 0>;
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reg = <0x40600000 0x10000>;
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};
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@ -15,7 +15,6 @@ is time for maintainers to start converting over the remaining serial drivers:
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serial_pxa.c
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serial_pxa.c
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serial_s3c24x0.c
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serial_s3c24x0.c
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serial_sa1100.c
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serial_sa1100.c
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serial_xuartlite.c
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usbtty.c
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usbtty.c
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You should complete this by the end of January 2016.
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You should complete this by the end of January 2016.
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@ -1,5 +1,5 @@
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/*
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/*
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* (C) Copyright 2008-2011 Michal Simek <monstr@monstr.eu>
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* (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
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* Clean driver and add xilinx constant from header file
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* Clean driver and add xilinx constant from header file
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*
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*
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* (C) Copyright 2004 Atmark Techno, Inc.
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* (C) Copyright 2004 Atmark Techno, Inc.
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@ -10,13 +10,17 @@
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#include <config.h>
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#include <config.h>
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#include <common.h>
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#include <common.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <linux/compiler.h>
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#include <linux/compiler.h>
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#include <serial.h>
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#include <serial.h>
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#define SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */
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DECLARE_GLOBAL_DATA_PTR;
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#define SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */
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#define SR_RX_FIFO_FULL 0x02 /* receive FIFO full */
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#define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
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#define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
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#define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
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#define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
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#define ULITE_CONTROL_RST_TX 0x01
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#define ULITE_CONTROL_RST_TX 0x01
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#define ULITE_CONTROL_RST_RX 0x02
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#define ULITE_CONTROL_RST_RX 0x02
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@ -28,135 +32,85 @@ struct uartlite {
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unsigned int control;
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unsigned int control;
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};
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};
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static struct uartlite *userial_ports[4] = {
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struct uartlite_platdata {
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#ifdef XILINX_UARTLITE_BASEADDR
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struct uartlite *regs;
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[0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
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#endif
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#ifdef XILINX_UARTLITE_BASEADDR1
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[1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
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#endif
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#ifdef XILINX_UARTLITE_BASEADDR2
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[2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
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#endif
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#ifdef XILINX_UARTLITE_BASEADDR3
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[3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
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#endif
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};
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};
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static void uartlite_serial_putc(const char c, const int port)
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static int uartlite_serial_putc(struct udevice *dev, const char ch)
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{
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{
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struct uartlite *regs = userial_ports[port];
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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struct uartlite *regs = plat->regs;
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if (c == '\n')
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if (in_be32(®s->status) & SR_TX_FIFO_FULL)
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uartlite_serial_putc('\r', port);
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return -EAGAIN;
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while (in_be32(®s->status) & SR_TX_FIFO_FULL)
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out_be32(®s->tx_fifo, ch & 0xff);
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;
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out_be32(®s->tx_fifo, c & 0xff);
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return 0;
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}
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}
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static void uartlite_serial_puts(const char *s, const int port)
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static int uartlite_serial_getc(struct udevice *dev)
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{
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{
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while (*s)
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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uartlite_serial_putc(*s++, port);
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struct uartlite *regs = plat->regs;
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}
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static int uartlite_serial_getc(const int port)
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if (!(in_be32(®s->status) & SR_RX_FIFO_VALID_DATA))
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{
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return -EAGAIN;
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struct uartlite *regs = userial_ports[port];
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while (!(in_be32(®s->status) & SR_RX_FIFO_VALID_DATA))
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;
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return in_be32(®s->rx_fifo) & 0xff;
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return in_be32(®s->rx_fifo) & 0xff;
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}
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}
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static int uartlite_serial_tstc(const int port)
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static int uartlite_serial_pending(struct udevice *dev, bool input)
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{
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{
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struct uartlite *regs = userial_ports[port];
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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struct uartlite *regs = plat->regs;
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return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA;
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if (input)
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return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA;
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return !(in_be32(®s->status) & SR_TX_FIFO_EMPTY);
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}
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}
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static int uartlite_serial_init(const int port)
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static int uartlite_serial_probe(struct udevice *dev)
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{
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{
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struct uartlite *regs = userial_ports[port];
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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struct uartlite *regs = plat->regs;
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if (regs) {
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out_be32(®s->control, 0);
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out_be32(®s->control, 0);
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out_be32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
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out_be32(®s->control,
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in_be32(®s->control);
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ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
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in_be32(®s->control);
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return 0;
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}
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return -1;
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return 0;
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}
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}
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/* Multi serial device functions */
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static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
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#define DECLARE_ESERIAL_FUNCTIONS(port) \
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static int userial##port##_init(void) \
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{ return uartlite_serial_init(port); } \
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static void userial##port##_setbrg(void) {} \
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static int userial##port##_getc(void) \
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{ return uartlite_serial_getc(port); } \
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static int userial##port##_tstc(void) \
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{ return uartlite_serial_tstc(port); } \
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static void userial##port##_putc(const char c) \
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{ uartlite_serial_putc(c, port); } \
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static void userial##port##_puts(const char *s) \
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{ uartlite_serial_puts(s, port); }
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/* Serial device descriptor */
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#define INIT_ESERIAL_STRUCTURE(port, __name) { \
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.name = __name, \
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.start = userial##port##_init, \
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.stop = NULL, \
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.setbrg = userial##port##_setbrg, \
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.getc = userial##port##_getc, \
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.tstc = userial##port##_tstc, \
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.putc = userial##port##_putc, \
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.puts = userial##port##_puts, \
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}
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DECLARE_ESERIAL_FUNCTIONS(0);
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struct serial_device uartlite_serial0_device =
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INIT_ESERIAL_STRUCTURE(0, "ttyUL0");
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DECLARE_ESERIAL_FUNCTIONS(1);
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struct serial_device uartlite_serial1_device =
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INIT_ESERIAL_STRUCTURE(1, "ttyUL1");
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DECLARE_ESERIAL_FUNCTIONS(2);
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struct serial_device uartlite_serial2_device =
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INIT_ESERIAL_STRUCTURE(2, "ttyUL2");
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DECLARE_ESERIAL_FUNCTIONS(3);
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struct serial_device uartlite_serial3_device =
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INIT_ESERIAL_STRUCTURE(3, "ttyUL3");
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__weak struct serial_device *default_serial_console(void)
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{
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{
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if (userial_ports[0])
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struct uartlite_platdata *plat = dev_get_platdata(dev);
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return &uartlite_serial0_device;
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if (userial_ports[1])
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return &uartlite_serial1_device;
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if (userial_ports[2])
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return &uartlite_serial2_device;
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if (userial_ports[3])
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return &uartlite_serial3_device;
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return NULL;
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plat->regs = (struct uartlite *)dev_get_addr(dev);
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return 0;
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}
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}
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void uartlite_serial_initialize(void)
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static const struct dm_serial_ops uartlite_serial_ops = {
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{
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.putc = uartlite_serial_putc,
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#ifdef XILINX_UARTLITE_BASEADDR
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.pending = uartlite_serial_pending,
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serial_register(&uartlite_serial0_device);
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.getc = uartlite_serial_getc,
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#endif /* XILINX_UARTLITE_BASEADDR */
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};
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#ifdef XILINX_UARTLITE_BASEADDR1
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serial_register(&uartlite_serial1_device);
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static const struct udevice_id uartlite_serial_ids[] = {
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#endif /* XILINX_UARTLITE_BASEADDR1 */
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{ .compatible = "xlnx,opb-uartlite-1.00.b", },
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#ifdef XILINX_UARTLITE_BASEADDR2
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{ .compatible = "xlnx,xps-uartlite-1.00.a" },
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serial_register(&uartlite_serial2_device);
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{ }
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#endif /* XILINX_UARTLITE_BASEADDR2 */
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};
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#ifdef XILINX_UARTLITE_BASEADDR3
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serial_register(&uartlite_serial3_device);
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U_BOOT_DRIVER(serial_uartlite) = {
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#endif /* XILINX_UARTLITE_BASEADDR3 */
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.name = "serial_uartlite",
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}
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.id = UCLASS_SERIAL,
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.of_match = uartlite_serial_ids,
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.ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
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.probe = uartlite_serial_probe,
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.ops = &uartlite_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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