diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index bd4b6b4ce5..1ccbe2c181 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -40,6 +41,8 @@ static const struct sdram_info sdram = { .trcd = 2, .tras = 5, .txsr = 5, + /* 7.81 us */ + .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, }; int board_early_init_f(void) diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 6618963cc0..28f64c4a6f 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -23,6 +23,7 @@ #include #include +#include #include #include @@ -40,6 +41,8 @@ static const struct sdram_info sdram = { .trcd = 2, .tras = 5, .txsr = 5, + /* 15.6 us */ + .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, }; int board_early_init_f(void) diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c index 93d790f173..40478258e7 100644 --- a/board/atmel/atstk1000/flash.c +++ b/board/atmel/atstk1000/flash.c @@ -159,7 +159,7 @@ int __flashprog write_buff(flash_info_t *info, uchar *src, { unsigned long flags; uint16_t *base, *p, *s, *end; - uint16_t word, status; + uint16_t word, status, status1; int ret = ERR_OK; if (addr < info->start[0] @@ -194,20 +194,33 @@ int __flashprog write_buff(flash_info_t *info, uchar *src, sync_write_buffer(); /* Wait for completion */ + status1 = readw(p); do { /* TODO: Timeout */ - status = readw(p); - } while ((status != word) && !(status & 0x28)); + status = status1; + status1 = readw(p); + } while (((status ^ status1) & 0x40) /* toggled */ + && !(status1 & 0x28)); /* error bits */ + + /* + * We'll need to check once again for toggle bit + * because the toggle bit may stop toggling as I/O5 + * changes to "1" (ref at49bv642.pdf p9) + */ + status1 = readw(p); + status = readw(p); + if ((status ^ status1) & 0x40) { + printf("Flash write error at address 0x%p: " + "0x%02x != 0x%02x\n", + p, status,word); + ret = ERR_PROG_ERROR; + writew(0xf0, base); + readw(base); + break; + } writew(0xf0, base); readw(base); - - if (status != word) { - printf("Flash write error at address 0x%p: 0x%02x\n", - p, status); - ret = ERR_PROG_ERROR; - break; - } } if (flags) diff --git a/cpu/at32ap/hsdramc.c b/cpu/at32ap/hsdramc.c index a936e03166..1fcfe75d74 100644 --- a/cpu/at32ap/hsdramc.c +++ b/cpu/at32ap/hsdramc.c @@ -38,6 +38,10 @@ unsigned long sdram_init(const struct sdram_info *info) unsigned long bus_hz; unsigned int i; + if (!info->refresh_period) + panic("ERROR: SDRAM refresh period == 0. " + "Please update the board code\n"); + tmp = (HSDRAMC1_BF(NC, info->col_bits - 8) | HSDRAMC1_BF(NR, info->row_bits - 11) | HSDRAMC1_BF(NB, info->bank_bits - 1) @@ -113,7 +117,7 @@ unsigned long sdram_init(const struct sdram_info *info) * 15.6 us is a typical value for a burst of length one */ bus_hz = get_sdram_clk_rate(); - hsdramc1_writel(TR, (156 * (bus_hz / 1000)) / 10000); + hsdramc1_writel(TR, info->refresh_period); printf("SDRAM: %u MB at address 0x%08lx\n", sdram_size >> 20, info->phys_addr); diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h index ea84c0874c..385319aac7 100644 --- a/include/asm-avr32/arch-at32ap700x/clk.h +++ b/include/asm-avr32/arch-at32ap700x/clk.h @@ -75,4 +75,7 @@ static inline unsigned long get_mci_clk_rate(void) } #endif +/* Board code may need the SDRAM base clock as a compile-time constant */ +#define SDRAMC_BUS_HZ (MAIN_CLK_RATE >> CFG_CLKDIV_HSB) + #endif /* __ASM_AVR32_ARCH_CLK_H__ */ diff --git a/include/asm-avr32/sdram.h b/include/asm-avr32/sdram.h index 5057eefa8a..833af6e6ad 100644 --- a/include/asm-avr32/sdram.h +++ b/include/asm-avr32/sdram.h @@ -26,6 +26,9 @@ struct sdram_info { unsigned long phys_addr; unsigned int row_bits, col_bits, bank_bits; unsigned int cas, twr, trc, trp, trcd, tras, txsr; + + /* SDRAM refresh period in cycles */ + unsigned long refresh_period; }; extern unsigned long sdram_init(const struct sdram_info *info); diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 414e130bb5..5aad043d89 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -170,13 +170,9 @@ #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) #define CFG_LONGHELP 1 -#define CFG_MEMTEST_START \ - ({ DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start; }) -#define CFG_MEMTEST_END \ - ({ \ - DECLARE_GLOBAL_DATA_PTR; \ - gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \ - }) +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000) + #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } #endif /* __CONFIG_H */ diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index b33e26fe01..95aeab6d4e 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -184,8 +184,8 @@ #define CFG_MALLOC_LEN (256*1024) #define CFG_DMA_ALLOC_LEN (16384) -/* Allow 2MB for the kernel run-time image */ -#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000) +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00400000) #define CFG_BOOTPARAMS_LEN (16 * 1024) /* Other configuration settings that shouldn't have to change all that often */ diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h index 1bad171cbf..b81fc21270 100644 --- a/include/configs/atstk1004.h +++ b/include/configs/atstk1004.h @@ -167,7 +167,7 @@ #define CFG_MALLOC_LEN (256*1024) -/* Allow 4MB for the kernel run-time image */ +/* Allow 2MB for the kernel run-time image */ #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000) #define CFG_BOOTPARAMS_LEN (16 * 1024)