- Remember the device being emulated for Sandbox PCI
- Update Kconfig options for FSP 1.0
- Drop RESET_BASE and RESET_SEG_SIZE that are no longer used
This commit is contained in:
Tom Rini 2019-10-12 10:52:48 -04:00
commit 9189d6f1e9
11 changed files with 73 additions and 45 deletions

View File

@ -207,11 +207,6 @@ config RESET_SEG_START
depends on X86_RESET_VECTOR
default 0xffff0000
config RESET_SEG_SIZE
hex
depends on X86_RESET_VECTOR
default 0x10000
config RESET_VEC_LOC
hex
depends on X86_RESET_VECTOR
@ -397,7 +392,7 @@ endchoice
config FSP_FILE
string "Firmware Support Package binary filename"
depends on HAVE_FSP
depends on FSP_VERSION1
default "fsp.bin"
help
The filename of the file to use as Firmware Support Package binary
@ -405,7 +400,7 @@ config FSP_FILE
config FSP_ADDR
hex "Firmware Support Package binary location"
depends on HAVE_FSP
depends on FSP_VERSION1
default 0xfffc0000
help
FSP is not Position Independent Code (PIC) and the whole FSP has to
@ -418,7 +413,7 @@ config FSP_ADDR
config FSP_TEMP_RAM_ADDR
hex
depends on HAVE_FSP
depends on FSP_VERSION1
default 0x2000000
help
Stack top address which is used in fsp_init() after DRAM is ready and
@ -426,14 +421,14 @@ config FSP_TEMP_RAM_ADDR
config FSP_SYS_MALLOC_F_LEN
hex
depends on HAVE_FSP
depends on FSP_VERSION1
default 0x100000
help
Additional size of malloc() pool before relocation.
config FSP_USE_UPD
bool
depends on HAVE_FSP
depends on FSP_VERSION1
default y
help
Most FSPs use UPD data region for some FSP customization. But there
@ -442,7 +437,7 @@ config FSP_USE_UPD
config FSP_BROKEN_HOB
bool
depends on HAVE_FSP
depends on FSP_VERSION1
help
Indicate some buggy FSPs that does not report memory used by FSP
itself as reserved in the resource descriptor HOB. Select this to
@ -600,7 +595,7 @@ config VGA_BIOS_ADDR
config HAVE_VBT
bool "Add a Video BIOS Table (VBT) image"
depends on HAVE_FSP
depends on FSP_VERSION1
help
Select this option if you have a Video BIOS Table (VBT) image that
you would like to add to your ROM. This is normally required if you

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@ -7,10 +7,8 @@ CROSS_COMPILE ?= i386-linux-
# DO NOT MODIFY THE FOLLOWING UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!
LDPPFLAGS += -DRESET_SEG_START=$(CONFIG_RESET_SEG_START)
LDPPFLAGS += -DRESET_SEG_SIZE=$(CONFIG_RESET_SEG_SIZE)
LDPPFLAGS += -DRESET_VEC_LOC=$(CONFIG_RESET_VEC_LOC)
LDPPFLAGS += -DSTART_16=$(CONFIG_SYS_X86_START16)
LDPPFLAGS += -DRESET_BASE="CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - RESET_SEG_SIZE)"
ifdef CONFIG_X86_64
ifndef CONFIG_SPL_BUILD

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@ -16,6 +16,3 @@ reset_vector:
cli
cld
jmp start16
.org 0xf
nop

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@ -17,19 +17,20 @@
DECLARE_GLOBAL_DATA_PTR;
static uint mrc_block_size(uint data_size)
{
uint mrc_size = sizeof(struct mrc_data_container) + data_size;
return ALIGN(mrc_size, MRC_DATA_ALIGN);
}
static struct mrc_data_container *next_mrc_block(
struct mrc_data_container *cache)
{
/* MRC data blocks are aligned within the region */
u32 mrc_size = sizeof(*cache) + cache->data_size;
u8 *region_ptr = (u8 *)cache;
if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
mrc_size += MRC_DATA_ALIGN;
}
region_ptr += mrc_size;
region_ptr += mrc_block_size(cache->data_size);
return (struct mrc_data_container *)region_ptr;
}

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@ -113,7 +113,7 @@ void board_init_f(ulong flags)
ret = x86_spl_init();
if (ret) {
debug("Error %d\n", ret);
hang();
panic("x86_spl_init fail");
}
#ifdef CONFIG_TPL
gd->bd = malloc(sizeof(*gd->bd));

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@ -55,7 +55,7 @@ void board_init_f(ulong flags)
ret = x86_tpl_init();
if (ret) {
debug("Error %d\n", ret);
hang();
panic("x86_tpl_init fail");
}
/* Uninit CAR and jump to board_init_f_r() */

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@ -86,7 +86,7 @@ u32 iotrace_readl(const void *ptr)
return v;
}
void iotrace_writel(ulong value, const void *ptr)
void iotrace_writel(ulong value, void *ptr)
{
add_record(IOT_32 | IOT_WRITE, ptr, value);
writel(value, ptr);
@ -102,7 +102,7 @@ u16 iotrace_readw(const void *ptr)
return v;
}
void iotrace_writew(ulong value, const void *ptr)
void iotrace_writew(ulong value, void *ptr)
{
add_record(IOT_16 | IOT_WRITE, ptr, value);
writew(value, ptr);
@ -118,7 +118,7 @@ u8 iotrace_readb(const void *ptr)
return v;
}
void iotrace_writeb(ulong value, const void *ptr)
void iotrace_writeb(ulong value, void *ptr)
{
add_record(IOT_8 | IOT_WRITE, ptr, value);
writeb(value, ptr);

View File

@ -18,6 +18,7 @@ struct sandbox_pci_emul_priv {
int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
struct udevice **containerp, struct udevice **emulp)
{
struct pci_emul_uc_priv *upriv;
struct udevice *dev;
int ret;
@ -30,16 +31,32 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
}
*containerp = dev;
/*
* See commit 4345998ae9df,
* "pci: sandbox: Support dynamically binding device driver"
*/
ret = uclass_get_device_by_phandle(UCLASS_PCI_EMUL, dev, "sandbox,emul",
emulp);
if (ret && device_get_uclass_id(dev) != UCLASS_PCI_GENERIC)
*emulp = dev;
if (!ret) {
upriv = dev_get_uclass_priv(*emulp);
return *emulp ? 0 : -ENODEV;
upriv->client = dev;
} else if (device_get_uclass_id(dev) != UCLASS_PCI_GENERIC) {
/*
* See commit 4345998ae9df,
* "pci: sandbox: Support dynamically binding device driver"
*/
*emulp = dev;
}
return 0;
}
int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp)
{
struct pci_emul_uc_priv *upriv = dev_get_uclass_priv(emul);
if (!upriv->client)
return -ENOENT;
*devp = upriv->client;
return 0;
}
uint sandbox_pci_read_bar(u32 barval, int type, uint size)
@ -88,6 +105,7 @@ UCLASS_DRIVER(pci_emul) = {
.post_probe = sandbox_pci_emul_post_probe,
.pre_remove = sandbox_pci_emul_pre_remove,
.priv_auto_alloc_size = sizeof(struct sandbox_pci_emul_priv),
.per_device_auto_alloc_size = sizeof(struct pci_emul_uc_priv),
};
/*

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@ -49,30 +49,29 @@ struct iotrace_record {
#define readl(addr) iotrace_readl((const void *)(addr))
#undef writel
#define writel(val, addr) iotrace_writel(val, (const void *)(addr))
#define writel(val, addr) iotrace_writel(val, (void *)(addr))
#undef readw
#define readw(addr) iotrace_readw((const void *)(addr))
#undef writew
#define writew(val, addr) iotrace_writew(val, (const void *)(addr))
#define writew(val, addr) iotrace_writew(val, (void *)(addr))
#undef readb
#define readb(addr) iotrace_readb((const void *)(uintptr_t)addr)
#undef writeb
#define writeb(val, addr) \
iotrace_writeb(val, (const void *)(uintptr_t)addr)
#define writeb(val, addr) iotrace_writeb(val, (void *)(uintptr_t)addr)
#endif
/* Tracing functions which mirror their io.h counterparts */
u32 iotrace_readl(const void *ptr);
void iotrace_writel(ulong value, const void *ptr);
void iotrace_writel(ulong value, void *ptr);
u16 iotrace_readw(const void *ptr);
void iotrace_writew(ulong value, const void *ptr);
void iotrace_writew(ulong value, void *ptr);
u8 iotrace_readb(const void *ptr);
void iotrace_writeb(ulong value, const void *ptr);
void iotrace_writeb(ulong value, void *ptr);
/**
* iotrace_reset_checksum() - Reset the iotrace checksum

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@ -1490,6 +1490,17 @@ int dm_pci_find_device(unsigned int vendor, unsigned int device, int index,
*/
int dm_pci_find_class(uint find_class, int index, struct udevice **devp);
/**
* struct pci_emul_uc_priv - holds info about an emulator device
*
* There is always at most one emulator per client
*
* @client: Client device if any, else NULL
*/
struct pci_emul_uc_priv {
struct udevice *client;
};
/**
* struct dm_pci_emul_ops - PCI device emulator operations
*/
@ -1592,6 +1603,15 @@ struct dm_pci_emul_ops {
int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
struct udevice **containerp, struct udevice **emulp);
/**
* sandbox_pci_get_client() - Find the client for an emulation device
*
* @emul: Emulation device to check
* @devp: Returns the client device emulated by this device
* @return 0 if OK, -ENOENT if the device has no client yet
*/
int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp);
/**
* pci_get_devfn() - Extract the devfn from fdt_pci_addr of the device
*

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@ -931,13 +931,13 @@ old.
To enable a full backtrace and other debugging features in binman, pass
BINMAN_DEBUG=1 to your build:
make sandbox_defconfig
make qemu-x86_defconfig
make BINMAN_DEBUG=1
To enable verbose logging from binman, base BINMAN_VERBOSE to your build, which
adds a -v<level> option to the call to binman:
make sandbox_defconfig
make qemu-x86_defconfig
make BINMAN_VERBOSE=5