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https://github.com/brain-hackers/u-boot-brain
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net: designware: support phy reset device-tree bindings
Add support for the snps,reset-gpio, snps,reset-active-low (optional) and snps,reset-delays-us device-tree bindings. The combination of these three define how the PHY should be reset to ensure it's in a sane state. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Sjoerd Simons
Simon Glass
parent
6523dbf7cc
commit
90b7fc924a
@ -24,7 +24,12 @@ DECLARE_GLOBAL_DATA_PTR;
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static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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#ifdef CONFIG_DM_ETH
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struct dw_eth_dev *priv = dev_get_priv((struct udevice *)bus->priv);
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struct eth_mac_regs *mac_p = priv->mac_regs_p;
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#else
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struct eth_mac_regs *mac_p = bus->priv;
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#endif
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ulong start;
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u16 miiaddr;
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int timeout = CONFIG_MDIO_TIMEOUT;
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@ -47,7 +52,12 @@ static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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static int dw_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
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u16 val)
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{
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#ifdef CONFIG_DM_ETH
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struct dw_eth_dev *priv = dev_get_priv((struct udevice *)bus->priv);
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struct eth_mac_regs *mac_p = priv->mac_regs_p;
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#else
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struct eth_mac_regs *mac_p = bus->priv;
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#endif
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ulong start;
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u16 miiaddr;
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int ret = -ETIMEDOUT, timeout = CONFIG_MDIO_TIMEOUT;
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@ -70,7 +80,41 @@ static int dw_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
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return ret;
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}
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static int dw_mdio_init(const char *name, struct eth_mac_regs *mac_regs_p)
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#if CONFIG_DM_ETH
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static int dw_mdio_reset(struct mii_dev *bus)
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{
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struct udevice *dev = bus->priv;
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struct dw_eth_dev *priv = dev_get_priv(dev);
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struct dw_eth_pdata *pdata = dev_get_platdata(dev);
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int ret;
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if (!dm_gpio_is_valid(&priv->reset_gpio))
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return 0;
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/* reset the phy */
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ret = dm_gpio_set_value(&priv->reset_gpio, 0);
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if (ret)
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return ret;
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udelay(pdata->reset_delays[0]);
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ret = dm_gpio_set_value(&priv->reset_gpio, 1);
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if (ret)
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return ret;
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udelay(pdata->reset_delays[1]);
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ret = dm_gpio_set_value(&priv->reset_gpio, 0);
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if (ret)
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return ret;
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udelay(pdata->reset_delays[2]);
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return 0;
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}
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#endif
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static int dw_mdio_init(const char *name, void *priv)
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{
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struct mii_dev *bus = mdio_alloc();
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@ -82,8 +126,11 @@ static int dw_mdio_init(const char *name, struct eth_mac_regs *mac_regs_p)
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bus->read = dw_mdio_read;
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bus->write = dw_mdio_write;
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snprintf(bus->name, sizeof(bus->name), "%s", name);
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#ifdef CONFIG_DM_ETH
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bus->reset = dw_mdio_reset;
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#endif
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bus->priv = (void *)mac_regs_p;
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bus->priv = priv;
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return mdio_register(bus);
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}
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@ -606,7 +653,7 @@ static int designware_eth_probe(struct udevice *dev)
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priv->interface = pdata->phy_interface;
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priv->max_speed = pdata->max_speed;
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dw_mdio_init(dev->name, priv->mac_regs_p);
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dw_mdio_init(dev->name, dev);
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priv->bus = miiphy_get_dev_by_name(dev->name);
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ret = dw_phy_init(priv, dev);
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@ -637,9 +684,13 @@ static const struct eth_ops designware_eth_ops = {
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static int designware_eth_ofdata_to_platdata(struct udevice *dev)
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{
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
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struct dw_eth_dev *priv = dev_get_priv(dev);
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struct eth_pdata *pdata = &dw_pdata->eth_pdata;
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const char *phy_mode;
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const fdt32_t *cell;
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int reset_flags = GPIOD_IS_OUT;
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int ret = 0;
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pdata->iobase = dev_get_addr(dev);
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pdata->phy_interface = -1;
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@ -656,7 +707,20 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
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if (cell)
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pdata->max_speed = fdt32_to_cpu(*cell);
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return 0;
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if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
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"snps,reset-active-low"))
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reset_flags |= GPIOD_ACTIVE_LOW;
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ret = gpio_request_by_name(dev, "snps,reset-gpio", 0,
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&priv->reset_gpio, reset_flags);
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if (ret == 0) {
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ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
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"snps,reset-delays-us", dw_pdata->reset_delays, 3);
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} else if (ret == -ENOENT) {
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ret = 0;
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}
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return ret;
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}
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static const struct udevice_id designware_eth_ids[] = {
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@ -675,7 +739,7 @@ U_BOOT_DRIVER(eth_designware) = {
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.remove = designware_eth_remove,
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.ops = &designware_eth_ops,
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.priv_auto_alloc_size = sizeof(struct dw_eth_dev),
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.platdata_auto_alloc_size = sizeof(struct eth_pdata),
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.platdata_auto_alloc_size = sizeof(struct dw_eth_pdata),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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@ -8,6 +8,8 @@
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#ifndef _DW_ETH_H
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#define _DW_ETH_H
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#include <asm/gpio.h>
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#define CONFIG_TX_DESCR_NUM 16
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#define CONFIG_RX_DESCR_NUM 16
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#define CONFIG_ETH_BUFSIZE 2048
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@ -232,8 +234,16 @@ struct dw_eth_dev {
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#ifndef CONFIG_DM_ETH
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struct eth_device *dev;
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#endif
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struct gpio_desc reset_gpio;
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struct phy_device *phydev;
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struct mii_dev *bus;
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};
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#ifdef CONFIG_DM_ETH
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struct dw_eth_pdata {
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struct eth_pdata eth_pdata;
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u32 reset_delays[3];
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};
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#endif
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#endif
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