ARM: DRA7xx: add support for reading cpsw 2nd mac from efuse

Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also correct the bit masking of mac id read from the efuse.

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
This commit is contained in:
Mugunthan V N 2014-02-18 07:31:56 -05:00 committed by Tom Rini
parent a35ad51efe
commit 8feb37b9be

View File

@ -216,6 +216,21 @@ int board_eth_init(bd_t *bis)
if (is_valid_ether_addr(mac_addr)) if (is_valid_ether_addr(mac_addr))
eth_setenv_enetaddr("ethaddr", mac_addr); eth_setenv_enetaddr("ethaddr", mac_addr);
} }
mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
mac_addr[2] = mac_hi & 0xFF;
mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
if (!getenv("eth1addr")) {
if (is_valid_ether_addr(mac_addr))
eth_setenv_enetaddr("eth1addr", mac_addr);
}
ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33); ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
ctrl_val |= 0x22; ctrl_val |= 0x22;
writel(ctrl_val, (*ctrl)->control_core_control_io1); writel(ctrl_val, (*ctrl)->control_core_control_io1);