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https://github.com/brain-hackers/u-boot-brain
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ppc: qemu: Switch over to use DM ETH and PCI
At present the board supports non-DM version PCI and E1000 drivers. Switch over to use DM ETH and PCI by: - Rewrite the PCI address map functions using DM APIs - Enable CONFIG_MISC_INIT_R to do the PCI initialization and address map - Drop unnecessary ad-hoc config macros - Remove board_eth_init() in the board codes Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Bin Meng
Priyanka Jain
parent
8461ee5115
commit
8ee401670a
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@ -6,6 +6,7 @@
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#include <common.h>
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#include <command.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <env.h>
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#include <init.h>
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#include <log.h>
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@ -79,27 +80,9 @@ int checkboard(void)
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return 0;
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}
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static int pci_map_region(void *fdt, int pci_node, int range_id,
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phys_addr_t *pbaddr, phys_size_t *ppaddr,
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pci_addr_t *pvaddr, pci_size_t *psize,
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ulong *pmap_addr)
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static int pci_map_region(phys_addr_t paddr, phys_size_t size, ulong *pmap_addr)
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{
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uint64_t baddr;
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uint64_t paddr;
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uint64_t size;
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ulong map_addr;
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int r;
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r = fdt_read_range(fdt, pci_node, range_id, &baddr, &paddr, &size);
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if (r)
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return r;
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if (pbaddr)
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*pbaddr = baddr;
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if (ppaddr)
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*ppaddr = paddr;
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if (psize)
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*psize = size;
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if (!pmap_addr)
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return 0;
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@ -117,82 +100,37 @@ static int pci_map_region(void *fdt, int pci_node, int range_id,
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assert(!tlb_map_range(map_addr, paddr, size, TLB_MAP_IO));
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*pmap_addr = map_addr + size;
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if (pvaddr)
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*pvaddr = map_addr;
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return 0;
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}
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void pci_init_board(void)
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int misc_init_r(void)
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{
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struct pci_controller *pci_hoses;
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void *fdt = get_fdt_virt();
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int pci_node = -1;
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int pci_num = 0;
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int pci_count = 0;
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struct udevice *dev;
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struct pci_region *io;
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struct pci_region *mem;
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struct pci_region *pre;
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ulong map_addr;
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int ret;
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puts("\n");
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/* Ensure PCI is probed */
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uclass_first_device(UCLASS_PCI, &dev);
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pci_get_regions(dev, &io, &mem, &pre);
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/* Start MMIO and PIO range maps above RAM */
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map_addr = CONFIG_SYS_PCI_MAP_START;
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/* Count and allocate PCI buses */
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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while (pci_node != -FDT_ERR_NOTFOUND) {
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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pci_count++;
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}
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/* Map MMIO range */
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ret = pci_map_region(mem->phys_start, mem->size, &map_addr);
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if (ret)
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return ret;
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if (pci_count) {
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pci_hoses = malloc(sizeof(struct pci_controller) * pci_count);
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} else {
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printf("PCI: disabled\n\n");
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return;
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}
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/* Map PIO range */
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ret = pci_map_region(io->phys_start, io->size, &map_addr);
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if (ret)
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return ret;
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/* Spawn PCI buses based on device tree */
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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while (pci_node != -FDT_ERR_NOTFOUND) {
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struct fsl_pci_info pci_info = { };
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const fdt32_t *reg;
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int r;
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reg = fdt_getprop(fdt, pci_node, "reg", NULL);
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pci_info.regs = fdt_translate_address(fdt, pci_node, reg);
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/* Map MMIO range */
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r = pci_map_region(fdt, pci_node, 0, &pci_info.mem_bus,
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&pci_info.mem_phys, NULL,
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&pci_info.mem_size, &map_addr);
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if (r)
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break;
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/* Map PIO range */
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r = pci_map_region(fdt, pci_node, 1, &pci_info.io_bus,
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&pci_info.io_phys, NULL,
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&pci_info.io_size, &map_addr);
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if (r)
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break;
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/* Instantiate */
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pci_info.pci_num = pci_num + 1;
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fsl_setup_hose(&pci_hoses[pci_num], pci_info.regs);
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printf("PCI: base address %lx\n", pci_info.regs);
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fsl_pci_init_port(&pci_info, &pci_hoses[pci_num], pci_num);
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/* Jump to next PCI node */
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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pci_num++;
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}
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puts("\n");
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return 0;
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}
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int last_stage_init(void)
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@ -235,16 +173,9 @@ static uint64_t get_linear_ram_size(void)
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panic("Couldn't determine RAM size");
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}
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int board_eth_init(struct bd_info *bis)
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{
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return pci_eth_init(bis);
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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FT_FSL_PCI_SETUP;
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return 0;
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}
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#endif
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@ -11,7 +11,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=1
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_LAST_STAGE_INIT=y
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# CONFIG_MISC_INIT_R is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_REGINFO=y
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CONFIG_CMD_BOOTZ=y
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@ -29,7 +28,10 @@ CONFIG_ENV_OVERWRITE=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_DM=y
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# CONFIG_MMC is not set
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CONFIG_DM_ETH=y
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CONFIG_E1000=y
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CONFIG_DM_PCI=y
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CONFIG_PCI_MPC85XX=y
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CONFIG_DM_SERIAL=y
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CONFIG_SYS_NS16550=y
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CONFIG_ADDR_MAP=y
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@ -13,8 +13,6 @@
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#define CONFIG_SYS_RAMBOOT
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#define CONFIG_PCI1 1 /* PCI controller 1 */
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#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
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#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
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#define CONFIG_ENABLE_36BIT_PHYS
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@ -73,17 +71,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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/*
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* General PCI
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* Memory space is mapped 1-1, but I/O space must start from 0.
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*/
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#ifdef CONFIG_PCI
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#define CONFIG_PCI_INDIRECT_BRIDGE
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#endif /* CONFIG_PCI */
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#define CONFIG_LBA48
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/*
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