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arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3

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This patch adds support for reading silicon revision using zynqmp nvmem
driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Anurag Kumar Vulisha 2017-03-02 14:40:51 +05:30 committed by Michal Simek
parent b0c55207bf
commit 8e5a4e6f0e
1 changed files with 4 additions and 0 deletions
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4
arch/arm/dts/zynqmp.dtsi
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@ -1022,6 +1022,8 @@
iommus = <&smmu 0x860>;
power-domains = <&pd_usb0>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
dwc3_0: dwc3@fe200000 {
compatible = "snps,dwc3";
@ -1045,6 +1047,8 @@
iommus = <&smmu 0x861>;
power-domains = <&pd_usb1>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
dwc3_1: dwc3@fe300000 {
compatible = "snps,dwc3";