Added uart_gpio_conf() in serial_init(), seperated uart port configuration from cpu_init() to uart_gpio_conf()

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
This commit is contained in:
TsiChungLiew 2007-08-05 03:55:21 -05:00 committed by Stefan Roese
parent 6fde84a44b
commit 8d1d66af54
2 changed files with 25 additions and 14 deletions

View File

@ -60,20 +60,6 @@ void cpu_init_f(void)
scm2->pacrg = 0;
scm1->pacrh = 0;
/* Setup Ports: */
switch (CFG_UART_PORT) {
case 0:
gpio->par_uart = (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
break;
case 1:
gpio->par_uart =
(GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
break;
case 2:
gpio->par_uart = (GPIO_PAR_TIN3_URXD2 | GPIO_PAR_TIN2_UTXD2);
break;
}
/* Port configuration */
gpio->par_cs = 0x3E;
@ -124,3 +110,24 @@ int cpu_init_r(void)
{
return (0);
}
void uart_port_conf(void)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
/* Setup Ports: */
switch (CFG_UART_PORT) {
case 0:
gpio->par_uart = (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
break;
case 1:
gpio->par_uart =
(GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
break;
case 2:
gpio->par_timer &= 0x0F;
gpio->par_timer |= (GPIO_PAR_TIN3_URXD2 | GPIO_PAR_TIN2_UTXD2);
break;
}
}

View File

@ -34,6 +34,8 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_MCFUART
extern void uart_port_conf(void);
int serial_init(void)
{
volatile uart_t *uart;
@ -41,6 +43,8 @@ int serial_init(void)
uart = (volatile uart_t *)(CFG_UART_BASE);
uart_port_conf();
/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
uart->ucr = UART_UCR_RESET_RX;
uart->ucr = UART_UCR_RESET_TX;