From 63b312d8825b25ab164f22b9390d86de568b17dc Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Wed, 7 Aug 2019 16:30:53 +0800 Subject: [PATCH 1/3] arm: socfpga: Fix SYSRESET_SOCFPGA_S10 config name The CONFIG name should be SYSRESET_SOCFPGA_S10 instead of SYSRESET_SOCFPGA_STRATIX10. Signed-off-by: Ley Foon Tan --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index be2c96a93d..1cb89c6f15 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -902,7 +902,7 @@ config ARCH_SOCFPGA select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 select SYSRESET select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 - select SYSRESET_SOCFPGA_STRATIX10 if TARGET_SOCFPGA_STRATIX10 + select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10 imply CMD_DM imply CMD_MTDPARTS imply CRC32_VERIFY From 998f7cb29af596f523b8d8b90c968ebd7e8dc178 Mon Sep 17 00:00:00 2001 From: Dalon Westergreen Date: Wed, 7 Aug 2019 10:37:36 -0700 Subject: [PATCH 2/3] ARM: socfpga: update CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img Bring cyclone5 / arria5 / arria10 in line with convention and use u-boot.img as CONFIG_SPL_FS_LOAD_PAYLOAD_NAME. Signed-off-by: Dalon Westergreen --- include/configs/socfpga_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d1034ac280..36b0ed5459 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -203,7 +203,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #endif #else From a89441a74f6df1f75b942f6906724620fad2e8e1 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Fri, 12 Jul 2019 20:03:09 +0200 Subject: [PATCH 3/3] arm: socfpga: gen5: don't zero bss in board_init_f() The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the DDR driver does not use bss any more, bss is not used before board_init_r() and we can remove this hack. bss is normally zeroed by crt0.S, but after board_init_f(), before board_init_r(). socfpga just had this double-zeroing because it invalidly used bss in board_init_f() already (during DDR initialization). Signed-off-by: Simon Goldschmidt --- arch/arm/mach-socfpga/spl_gen5.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index 87b76b47de..47e63709ad 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -79,8 +79,6 @@ void board_init_f(ulong dummy) writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN, &sysmgr_regs->eccgrp_ocram); - memset(__bss_start, 0, __bss_end - __bss_start); - socfpga_sdram_remap_zero(); socfpga_pl310_clear();