mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 08:28:51 +09:00
Reworked IRQ mapping in OF-tree.
This commit is contained in:
parent
0e4c2a17ca
commit
8be429a5dd
@ -71,7 +71,7 @@
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device_type = "i2c";
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device_type = "i2c";
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compatible = "fsl-i2c";
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compatible = "fsl-i2c";
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reg = <3000 100>;
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reg = <3000 100>;
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interrupts = <2b 0>;
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interrupts = <2b 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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dfsrr;
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dfsrr;
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};
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};
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@ -80,7 +80,7 @@
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device_type = "i2c";
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device_type = "i2c";
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compatible = "fsl-i2c";
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compatible = "fsl-i2c";
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reg = <3100 100>;
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reg = <3100 100>;
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interrupts = <2b 0>;
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interrupts = <2b 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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dfsrr;
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dfsrr;
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};
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};
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@ -95,28 +95,28 @@
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ethernet-phy@0 {
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ethernet-phy@0 {
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linux,phandle = <2452000>;
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linux,phandle = <2452000>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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interrupts = <3a 0>;
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interrupts = <4a 1>;
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reg = <0>;
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reg = <0>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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ethernet-phy@1 {
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ethernet-phy@1 {
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linux,phandle = <2452001>;
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linux,phandle = <2452001>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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interrupts = <3a 0>;
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interrupts = <4a 1>;
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reg = <1>;
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reg = <1>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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ethernet-phy@2 {
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ethernet-phy@2 {
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linux,phandle = <2452002>;
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linux,phandle = <2452002>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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interrupts = <3a 0>;
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interrupts = <4a 1>;
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reg = <2>;
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reg = <2>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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ethernet-phy@3 {
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ethernet-phy@3 {
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linux,phandle = <2452003>;
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linux,phandle = <2452003>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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interrupts = <3a 0>;
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interrupts = <4a 1>;
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reg = <3>;
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reg = <3>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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@ -130,7 +130,7 @@
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compatible = "gianfar";
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compatible = "gianfar";
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reg = <24000 1000>;
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reg = <24000 1000>;
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address = [ 00 E0 0C 00 73 00 ];
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address = [ 00 E0 0C 00 73 00 ];
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interrupts = <1d 3 1e 3 22 3>;
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interrupts = <1d 2 1e 2 22 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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phy-handle = <2452000>;
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phy-handle = <2452000>;
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};
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};
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@ -143,7 +143,7 @@
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compatible = "gianfar";
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compatible = "gianfar";
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reg = <25000 1000>;
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reg = <25000 1000>;
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address = [ 00 E0 0C 00 73 01 ];
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address = [ 00 E0 0C 00 73 01 ];
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interrupts = <23 3 24 3 28 3>;
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interrupts = <23 2 24 2 28 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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phy-handle = <2452001>;
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phy-handle = <2452001>;
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};
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};
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@ -156,7 +156,7 @@
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compatible = "gianfar";
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compatible = "gianfar";
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reg = <26000 1000>;
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reg = <26000 1000>;
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address = [ 00 E0 0C 00 02 FD ];
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address = [ 00 E0 0C 00 02 FD ];
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interrupts = <1F 3 20 3 21 3>;
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interrupts = <1F 2 20 2 21 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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phy-handle = <2452002>;
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phy-handle = <2452002>;
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};
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};
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@ -169,7 +169,7 @@
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compatible = "gianfar";
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compatible = "gianfar";
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reg = <27000 1000>;
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reg = <27000 1000>;
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address = [ 00 E0 0C 00 03 FD ];
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address = [ 00 E0 0C 00 03 FD ];
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interrupts = <25 3 26 3 27 3>;
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interrupts = <25 2 26 2 27 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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phy-handle = <2452003>;
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phy-handle = <2452003>;
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};
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};
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@ -178,7 +178,7 @@
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compatible = "ns16550";
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compatible = "ns16550";
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reg = <4500 100>;
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reg = <4500 100>;
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clock-frequency = <0>;
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clock-frequency = <0>;
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interrupts = <2a 3>;
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interrupts = <2a 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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};
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};
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@ -187,7 +187,7 @@
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compatible = "ns16550";
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compatible = "ns16550";
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reg = <4600 100>;
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reg = <4600 100>;
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clock-frequency = <0>;
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clock-frequency = <0>;
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interrupts = <1c 3>;
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interrupts = <2a 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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};
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};
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@ -204,8 +204,8 @@
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01000000 0 00000000 e2000000 0 00100000>;
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01000000 0 00000000 e2000000 0 00100000>;
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clock-frequency = <1fca055>;
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clock-frequency = <1fca055>;
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interrupt-parent = <40000>;
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interrupt-parent = <40000>;
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interrupts = <8 0>;
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interrupts = <18 2>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map-mask = <f800 0 0 f>;
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interrupt-map = <
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interrupt-map = <
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/* IDSEL 0x11 */
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/* IDSEL 0x11 */
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8800 0 0 1 40000 3 0
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8800 0 0 1 40000 3 0
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@ -220,16 +220,16 @@
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9000 0 0 4 40000 3 0
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9000 0 0 4 40000 3 0
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/* IDSEL 0x13 */
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/* IDSEL 0x13 */
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9800 0 0 1 40000 5 0
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9800 0 0 1 40000 0 0
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9800 0 0 2 40000 6 0
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9800 0 0 2 40000 0 0
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9800 0 0 3 40000 3 0
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9800 0 0 3 40000 0 0
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9800 0 0 4 40000 4 0
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9800 0 0 4 40000 0 0
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/* IDSEL 0x14 */
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/* IDSEL 0x14 */
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a000 0 0 1 40000 6 0
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a000 0 0 1 40000 0 0
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a000 0 0 2 40000 3 0
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a000 0 0 2 40000 0 0
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a000 0 0 3 40000 4 0
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a000 0 0 3 40000 0 0
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a000 0 0 4 40000 5 0
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a000 0 0 4 40000 0 0
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/* IDSEL 0x15 */
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/* IDSEL 0x15 */
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a800 0 0 1 40000 0 0
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a800 0 0 1 40000 0 0
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@ -262,41 +262,41 @@
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c800 0 0 4 40000 0 0
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c800 0 0 4 40000 0 0
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/* IDSEL 0x1a */
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/* IDSEL 0x1a */
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d000 0 0 1 40000 0 0
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d000 0 0 1 40000 6 0
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d000 0 0 2 40000 0 0
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d000 0 0 2 40000 3 0
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d000 0 0 3 40000 0 0
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d000 0 0 3 40000 4 0
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d000 0 0 4 40000 0 0
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d000 0 0 4 40000 5 0
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/* IDSEL 0x1b */
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/* IDSEL 0x1b */
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d800 0 0 1 40000 0 0
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d800 0 0 1 40000 5 0
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d800 0 0 2 40000 0 0
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d800 0 0 2 40000 0 0
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d800 0 0 3 40000 0 0
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d800 0 0 3 40000 0 0
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d800 0 0 4 40000 0 0
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d800 0 0 4 40000 0 0
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/* IDSEL 0x1c */
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/* IDSEL 0x1c */
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e000 0 0 1 40000 0 0
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e000 0 0 1 40000 9 0
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e000 0 0 2 40000 0 0
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e000 0 0 2 40000 a 0
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e000 0 0 3 40000 0 0
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e000 0 0 3 40000 c 0
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e000 0 0 4 40000 0 0
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e000 0 0 4 40000 7 0
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/* IDSEL 0x1d */
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/* IDSEL 0x1d */
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e800 0 0 1 40000 0 0
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e800 0 0 1 40000 9 0
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e800 0 0 2 40000 0 0
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e800 0 0 2 40000 a 0
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e800 0 0 3 40000 0 0
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e800 0 0 3 40000 b 0
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e800 0 0 4 40000 0 0
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e800 0 0 4 40000 0 0
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/* IDSEL 0x1e */
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/* IDSEL 0x1e */
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f000 0 0 1 40000 0 0
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f000 0 0 1 40000 c 0
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f000 0 0 2 40000 0 0
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f000 0 0 2 40000 0 0
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f000 0 0 3 40000 0 0
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f000 0 0 3 40000 0 0
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f000 0 0 4 40000 0 0
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f000 0 0 4 40000 0 0
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/* IDSEL 0x1f */
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/* IDSEL 0x1f */
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f800 0 0 1 40000 6 0
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f800 0 0 1 40000 6 0
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f800 0 0 2 40000 6 0
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f800 0 0 2 40000 0 0
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f800 0 0 3 40000 6 0
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f800 0 0 3 40000 0 0
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f800 0 0 4 40000 6 0
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f800 0 0 4 40000 0 0
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>;
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>;
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};
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};
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pic@40000 {
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pic@40000 {
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@ -310,6 +310,22 @@
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compatible = "chrp,open-pic";
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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device_type = "open-pic";
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big-endian;
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big-endian;
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interrupts = <
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10 2 11 2 12 2 13 2
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14 2 15 2 16 2 17 2
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18 2 19 2 1a 2 1b 2
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1c 2 1d 2 1e 2 1f 2
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20 2 21 2 22 2 23 2
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24 2 25 2 26 2 27 2
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28 2 29 2 2a 2 2b 2
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2c 2 2d 2 2e 2 2f 2
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30 2 31 2 32 2 33 2
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34 2 35 2 36 2 37 2
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38 2 39 2 2a 2 3b 2
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3c 2 3d 2 3e 2 3f 2
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48 1 49 2 4a 1
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>;
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interrupt-parent = <40000>;
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};
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};
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};
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};
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};
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};
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