diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c
index d8e05f6a8f..e085890d63 100644
--- a/arch/x86/cpu/apollolake/lpc.c
+++ b/arch/x86/cpu/apollolake/lpc.c
@@ -81,10 +81,11 @@ int lpc_open_pmio_window(uint base, uint size)
 
 		lgir_reg_num = find_unused_pmio_window();
 		if (lgir_reg_num < 0) {
-			log_err("LPC: Cannot open IO window: %lx size %lx\n",
-				bridge_base, size - bridged_size);
-			log_err("No more IO windows\n");
-
+			if (spl_phase() > PHASE_TPL) {
+				log_err("LPC: Cannot open IO window: %lx size %lx\n",
+					bridge_base, size - bridged_size);
+				log_err("No more IO windows\n");
+			}
 			return -ENOSPC;
 		}
 		lgir_reg_offset = LPC_GENERIC_IO_RANGE(lgir_reg_num);
@@ -127,15 +128,17 @@ struct acpi_ops apl_lpc_acpi_ops = {
 	.inject_dsdt	= southbridge_inject_dsdt,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_lpc_ids[] = {
 	{ .compatible = "intel,apl-lpc" },
 	{ }
 };
+#endif
 
 /* All pads are LPC already configured by the hostbridge, so no probing here */
 U_BOOT_DRIVER(intel_apl_lpc) = {
 	.name		= "intel_apl_lpc",
 	.id		= UCLASS_LPC,
-	.of_match	= apl_lpc_ids,
+	.of_match	= of_match_ptr(apl_lpc_ids),
 	ACPI_OPS_PTR(&apl_lpc_acpi_ops)
 };
diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c
index d9832ff249..39d6ad5ed4 100644
--- a/arch/x86/cpu/apollolake/pch.c
+++ b/arch/x86/cpu/apollolake/pch.c
@@ -23,14 +23,16 @@ static const struct pch_ops apl_pch_ops = {
 	.set_spi_protect = apl_set_spi_protect,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_pch_ids[] = {
 	{ .compatible = "intel,apl-pch" },
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_pch) = {
 	.name		= "intel_apl_pch",
 	.id		= UCLASS_PCH,
-	.of_match	= apl_pch_ids,
+	.of_match	= of_match_ptr(apl_pch_ids),
 	.ops		= &apl_pch_ops,
 };
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index c40065ab8c..e033baf120 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -212,15 +212,17 @@ static const struct acpi_pmc_ops apl_pmc_ops = {
 	.global_reset_set_enable = apl_global_reset_set_enable,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_pmc_ids[] = {
 	{ .compatible = "intel,apl-pmc" },
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_pmc) = {
 	.name		= "intel_apl_pmc",
 	.id		= UCLASS_ACPI_PMC,
-	.of_match	= apl_pmc_ids,
+	.of_match	= of_match_ptr(apl_pmc_ids),
 	.of_to_plat = apl_pmc_ofdata_to_uc_plat,
 	.probe		= apl_pmc_probe,
 	.ops		= &apl_pmc_ops,
diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c
index e523d85b1b..69e5899235 100644
--- a/arch/x86/cpu/apollolake/uart.c
+++ b/arch/x86/cpu/apollolake/uart.c
@@ -118,15 +118,17 @@ static int apl_ns16550_of_to_plat(struct udevice *dev)
 	return 0;
 }
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_ns16550_serial_ids[] = {
 	{ .compatible = "intel,apl-ns16550" },
 	{ },
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_ns16550) = {
 	.name	= "intel_apl_ns16550",
 	.id	= UCLASS_SERIAL,
-	.of_match = apl_ns16550_serial_ids,
+	.of_match = of_match_ptr(apl_ns16550_serial_ids),
 	.plat_auto	= sizeof(struct ns16550_plat),
 	.priv_auto	= sizeof(struct ns16550),
 	.ops	= &ns16550_serial_ops,
diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile
index 4a5cf17e41..8b9a810f66 100644
--- a/arch/x86/cpu/intel_common/Makefile
+++ b/arch/x86/cpu/intel_common/Makefile
@@ -26,7 +26,7 @@ obj-y += cpu.o
 obj-y += fast_spi.o
 obj-y += lpc.o
 obj-y += lpss.o
-obj-$(CONFIG_INTEL_GENERIC_WIFI) += generic_wifi.o
+obj-$(CONFIG_$(SPL_)INTEL_GENERIC_WIFI) += generic_wifi.o
 ifndef CONFIG_TARGET_EFI_APP
 obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += microcode.o
 ifndef CONFIG_$(SPL_)X86_64
diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index e71ea029e5..6515d1f471 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -230,15 +230,17 @@ static const struct irq_ops itss_ops = {
 #endif
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id itss_ids[] = {
 	{ .compatible = "intel,itss", .data = X86_IRQT_ITSS },
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(intel_itss) = {
 	.name		= "intel_itss",
 	.id		= UCLASS_IRQ,
-	.of_match	= itss_ids,
+	.of_match	= of_match_ptr(itss_ids),
 	.ops		= &itss_ops,
 	.bind		= itss_bind,
 	.of_to_plat = itss_of_to_plat,
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index 3765eeeab0..cb901f265e 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -184,15 +184,17 @@ static const struct p2sb_ops p2sb_ops = {
 	.set_hide	= intel_p2sb_set_hide,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id p2sb_ids[] = {
 	{ .compatible = "intel,p2sb" },
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(intel_p2sb) = {
 	.name		= "intel_p2sb",
 	.id		= UCLASS_P2SB,
-	.of_match	= p2sb_ids,
+	.of_match	= of_match_ptr(p2sb_ids),
 	.probe		= p2sb_probe,
 	.remove		= p2sb_remove,
 	.ops		= &p2sb_ops,
diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c
index f8d85d5a33..4a73cb240d 100644
--- a/arch/x86/cpu/turbo.c
+++ b/arch/x86/cpu/turbo.c
@@ -35,12 +35,15 @@ static inline void set_global_turbo_state(int state)
 }
 #endif
 
+/* gcc 7.3 does not wwant to drop strings, so use #ifdef */
+#ifndef CONFIG_TPL_BUILD
 static const char *const turbo_state_desc[] = {
 	[TURBO_UNKNOWN]		= "unknown",
 	[TURBO_UNAVAILABLE]	= "unavailable",
 	[TURBO_DISABLED]	= "available but hidden",
 	[TURBO_ENABLED]		= "available and visible"
 };
+#endif
 
 /*
  * Determine the current state of Turbo and cache it for later.
@@ -76,7 +79,9 @@ int turbo_get_state(void)
 	}
 
 	set_global_turbo_state(turbo_state);
+#ifndef CONFIG_TPL_BUILD
 	debug("Turbo is %s\n", turbo_state_desc[turbo_state]);
+#endif
 	return turbo_state;
 }
 
diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c
index b8b923c139..34b2c2ac5d 100644
--- a/board/google/chromebook_coral/coral.c
+++ b/board/google/chromebook_coral/coral.c
@@ -143,14 +143,16 @@ struct acpi_ops coral_acpi_ops = {
 	.inject_dsdt	= chromeos_acpi_gpio_generate,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id coral_ids[] = {
 	{ .compatible = "google,coral" },
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(coral_drv) = {
 	.name		= "coral",
 	.id		= UCLASS_SYSINFO,
-	.of_match	= coral_ids,
+	.of_match	= of_match_ptr(coral_ids),
 	ACPI_OPS_PTR(&coral_acpi_ops)
 };
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
index 41540d8ebc..eda95485c9 100644
--- a/drivers/gpio/intel_gpio.c
+++ b/drivers/gpio/intel_gpio.c
@@ -188,15 +188,17 @@ static const struct dm_gpio_ops gpio_intel_ops = {
 #endif
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id intel_intel_gpio_ids[] = {
 	{ .compatible = "intel,gpio" },
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(intel_gpio) = {
 	.name	= "intel_gpio",
 	.id	= UCLASS_GPIO,
-	.of_match = intel_intel_gpio_ids,
+	.of_match = of_match_ptr(intel_intel_gpio_ids),
 	.ops	= &gpio_intel_ops,
 	.of_to_plat	= intel_gpio_of_to_plat,
 	.probe	= intel_gpio_probe,
diff --git a/drivers/pinctrl/intel/pinctrl_apl.c b/drivers/pinctrl/intel/pinctrl_apl.c
index 2bb654c8a1..b512a85f3e 100644
--- a/drivers/pinctrl/intel/pinctrl_apl.c
+++ b/drivers/pinctrl/intel/pinctrl_apl.c
@@ -167,15 +167,17 @@ static int apl_pinctrl_of_to_plat(struct udevice *dev)
 	return intel_pinctrl_of_to_plat(dev, comm, 2);
 }
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id apl_gpio_ids[] = {
 	{ .compatible = "intel,apl-pinctrl"},
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(intel_apl_pinctrl) = {
 	.name		= "intel_apl_pinctrl",
 	.id		= UCLASS_PINCTRL,
-	.of_match	= apl_gpio_ids,
+	.of_match	= of_match_ptr(apl_gpio_ids),
 	.probe		= intel_pinctrl_probe,
 	.ops		= &intel_pinctrl_ops,
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
index 32a2836f0b..34446a34e6 100644
--- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c
+++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <log.h>
+#include <spl.h>
 #include <acpi/acpi_s3.h>
 #ifdef CONFIG_X86
 #include <asm/intel_pinctrl.h>
@@ -60,7 +61,8 @@ int pmc_gpe_init(struct udevice *dev)
 	 * are different and if they aren't, use the reset values.
 	 */
 	if (dw[0] == dw[1] || dw[1] == dw[2]) {
-		log_info("PMC: Using default GPE route");
+		if (spl_phase() > PHASE_TPL)
+			log_info("PMC: Using default GPE route");
 		gpio_cfg = readl(upriv->gpe_cfg);
 		for (i = 0; i < upriv->gpe0_count; i++)
 			dw[i] = gpio_cfg >> gpe0_shift(upriv, i);
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index e3677704b3..706d52b830 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -477,15 +477,17 @@ static const struct timer_ops tsc_timer_ops = {
 	.get_count = tsc_timer_get_count,
 };
 
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static const struct udevice_id tsc_timer_ids[] = {
 	{ .compatible = "x86,tsc-timer", },
 	{ }
 };
+#endif
 
 U_BOOT_DRIVER(x86_tsc_timer) = {
 	.name	= "x86_tsc_timer",
 	.id	= UCLASS_TIMER,
-	.of_match = tsc_timer_ids,
+	.of_match = of_match_ptr(tsc_timer_ids),
 	.probe = tsc_timer_probe,
 	.ops	= &tsc_timer_ops,
 };