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arm: socfpga: Add example config entry for EPCS/EPCQ SPI

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Add example config file entry for the Altera SPI controller. This SPI
controller can also, under special conditions, be used to operate the
EPCS/EPCQ SPI NOR.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This commit is contained in:
Marek Vasut 2014-09-27 01:18:29 +02:00
parent ebcaf966ed
commit 8a78ca9ea5
1 changed files with 19 additions and 0 deletions
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19
include/configs/socfpga_common.h
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@ -78,6 +78,25 @@
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS
/*
* EPCS/EPCQx1 Serial Flash Controller
*/
#ifdef CONFIG_ALTERA_SPI
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_BAR
/*
* The base address is configurable in QSys, each board must specify the
* base address based on it's particular FPGA configuration. Please note
* that the address here is incremented by 0x400 from the Base address
* selected in QSys, since the SPI registers are at offset +0x400.
* #define CONFIG_SYS_SPI_BASE 0xff240400
*/
#endif
/*
* Ethernet on SoC (EMAC)
*/