Kconfig: USB: Migrate CONFIG_USB_EHCI to CONFIG_USB_EHCI_HCD

In order to be able to migrate the various SoC EHCI CONFIG options we
first need to finish the switch from CONFIG_USB_EHCI to
CONFIG_USB_EHCI_HCD.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Tom Rini 2017-05-12 22:33:27 -04:00
parent 86a0307918
commit 8850c5d57c
160 changed files with 193 additions and 198 deletions

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@ -34,7 +34,7 @@ u32 imx_get_i2cclk(unsigned i2c_num);
#ifdef CONFIG_MXC_OCOTP
void enable_ocotp_clk(unsigned char enable);
#endif
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
void enable_usboh3_clk(unsigned char enable);
#endif
void init_clk_usdhc(u32 index);

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@ -161,7 +161,7 @@ void at91_spi1_hw_init(unsigned long cs_mask)
}
#endif
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI)
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI_HCD)
void at91_uhp_hw_init(void)
{
/* Enable VBus on UHP ports */

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@ -33,7 +33,7 @@ void uniphier_ld11_clk_init(void)
/* TODO: use "mmc-pwrseq-emmc" */
writel(1, SDCTRL_EMMC_HW_RESET);
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
{
/* FIXME: the current clk driver can not handle parents */
u32 tmp;

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@ -31,7 +31,7 @@ void uniphier_ld4_clk_init(void)
#ifdef CONFIG_UNIPHIER_ETH
tmp |= SC_CLKCTRL_CEN_ETHER;
#endif
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
#ifdef CONFIG_NAND_DENALI

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@ -46,7 +46,7 @@ void uniphier_pro4_clk_init(void)
#ifdef CONFIG_UNIPHIER_ETH
tmp |= SC_CLKCTRL_CEN_ETHER;
#endif
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
#endif
#ifdef CONFIG_NAND_DENALI

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@ -212,7 +212,7 @@ int board_init(void)
at91sam9x5ek_nand_hw_init();
#endif
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI)
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI_HCD)
at91_uhp_hw_init();
#endif
#ifdef CONFIG_LCD

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@ -181,7 +181,7 @@ int board_eth_init(bd_t *bis)
}
#endif
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,

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@ -24,7 +24,7 @@
static void setup_net_chip(void);
#endif
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/arch/ehci.h>
#include <asm/ehci-omap.h>
@ -206,7 +206,7 @@ int board_eth_init(bd_t *bis)
return rc;
}
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,

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@ -19,7 +19,7 @@
#include <asm/arch/clock.h>
#include <errno.h>
#include <i2c.h>
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/ehci-omap.h>
#endif
@ -33,7 +33,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Address of the framebuffer in RAM. */
#define FB_START_ADDRESS 0x88000000
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,

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@ -27,7 +27,7 @@
#include <asm/mach-types.h>
#include "overo.h"
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/ehci-omap.h>
#endif
@ -393,7 +393,7 @@ void board_mmc_power_init(void)
}
#endif
#if defined(CONFIG_USB_EHCI)
#if defined(CONFIG_USB_EHCI_HCD)
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@ -420,4 +420,4 @@ int ehci_hcd_stop(void)
return omap_ehci_hcd_stop();
}
#endif /* CONFIG_USB_EHCI */
#endif /* CONFIG_USB_EHCI_HCD */

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@ -195,7 +195,7 @@ void board_mmc_power_init(void)
}
#endif
#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
@ -219,4 +219,4 @@ int ehci_hcd_stop(int index)
{
return omap_ehci_hcd_stop();
}
#endif /* CONFIG_USB_EHCI */
#endif /* CONFIG_USB_EHCI_HCD */

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@ -19,7 +19,7 @@
#include <spl.h>
#include <mmc.h>
#include <asm/gpio.h>
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/ehci-omap.h>
#endif
@ -46,7 +46,7 @@ static const u32 gpmc_XR16L2751[] = {
XR16L2751_GPMC_CONFIG6,
};
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,

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@ -23,7 +23,7 @@
#include <i2c.h>
#include <spartan3.h>
#include <asm/gpio.h>
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/ehci-omap.h>
#endif
@ -95,7 +95,7 @@ static const u32 gpmc_fpga[] = {
FPGA_GPMC_CONFIG6,
};
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,

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@ -36,7 +36,7 @@
#include "beagle.h"
#include <command.h>
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/ehci-omap.h>
#endif
@ -538,7 +538,7 @@ void board_mmc_power_init(void)
}
#endif
#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
@ -563,7 +563,7 @@ int ehci_hcd_stop(int index)
return omap_ehci_hcd_stop();
}
#endif /* CONFIG_USB_EHCI */
#endif /* CONFIG_USB_EHCI_HCD */
#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
int board_eth_init(bd_t *bis)

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@ -20,7 +20,7 @@
#include "mux_data.h"
#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
#include <sata.h>
#include <usb.h>
#include <asm/gpio.h>
@ -151,7 +151,7 @@ int board_eth_init(bd_t *bis)
return 0;
}
#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
static void enable_host_clocks(void)
{
int auxclk;
@ -220,7 +220,7 @@ int board_mmc_init(bd_t *bis)
}
#endif
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,

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@ -15,7 +15,7 @@
#include "panda_mux_data.h"
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/arch/ehci.h>
#include <asm/ehci-omap.h>
@ -301,7 +301,7 @@ void board_mmc_power_init(void)
#endif
#endif
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,

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@ -100,7 +100,7 @@ struct us_data {
trans_cmnd transport; /* transport routine */
};
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
/*
* The U-Boot EHCI driver can handle any transfer length as long as there is
* enough free heap space left, but the SCSI READ(10) and WRITE(10) commands are

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@ -74,12 +74,6 @@ config USB_EHCI_HCD
You may want to read <file:Documentation/usb/ehci.txt>.
config USB_EHCI
bool
default USB_EHCI_HCD
---help---
TODO: rename after most boards switch to Kconfig
if USB_EHCI_HCD
config USB_EHCI_ATMEL

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@ -24,7 +24,7 @@ obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
# echi
obj-$(CONFIG_USB_EHCI) += ehci-hcd.o
obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
obj-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o
obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o
ifdef CONFIG_MPC512X

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@ -723,9 +723,9 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

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@ -334,9 +334,9 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SHA_HW_ACCEL
#endif
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#define CONFIG_HAS_FSL_DR_USB

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@ -476,8 +476,8 @@ combinations. this should be removed later
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#endif
#define CONFIG_USB_EHCI /* USB */
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD /* USB */
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#define CONFIG_HAS_FSL_DR_USB

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@ -88,7 +88,7 @@
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
#define CONFIG_SYS_USB_EHCI_CPU_INIT
#endif

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@ -366,7 +366,7 @@
#define CONFIG_HAS_FSL_DR_USB
#define CONFIG_SYS_SCCR_USBDRCM 3
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_USB_PHY_TYPE "utmi"
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

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@ -148,7 +148,7 @@
/*
* Support USB
*/
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
/* Current USB implementation supports the only USB controller,

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@ -376,7 +376,7 @@ extern int board_pci_host_broken(void);
#define CONFIG_PQ_MDS_PIB 1 /* PQ MDS Platform IO Board */
#define CONFIG_HAS_FSL_DR_USB 1 /* fixup device tree for the DR USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

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@ -651,7 +651,7 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

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@ -609,9 +609,9 @@
*/
#define CONFIG_HAS_FSL_MPH_USB
#ifdef CONFIG_HAS_FSL_MPH_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#endif

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@ -359,9 +359,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/*
* USB
*/
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_PCI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_PCI_EHCI_DEVICE 0

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@ -559,9 +559,9 @@
/*
* USB
*/
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_PCI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_PCI_EHCI_DEVICE 0

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@ -670,9 +670,9 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_HAS_FSL_DR_USB
#if defined(CONFIG_HAS_FSL_DR_USB)
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#endif
@ -733,7 +733,7 @@ extern unsigned long get_sdram_size(void);
#undef CONFIG_WATCHDOG /* watchdog disabled */
#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) \
#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \
|| defined(CONFIG_FSL_SATA)
#endif

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@ -606,9 +606,9 @@
*/
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#endif

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@ -253,9 +253,9 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#endif

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@ -594,7 +594,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_HAS_FSL_MPH_USB
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

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@ -637,7 +637,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

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@ -641,7 +641,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

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@ -527,9 +527,9 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

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@ -637,9 +637,9 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_HAS_FSL_DR_USB
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

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@ -12,7 +12,7 @@
#define __T208xQDS_H
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#if defined(CONFIG_ARCH_T2080)
#define CONFIG_FSL_SATA_V2
#define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */
@ -702,7 +702,7 @@ unsigned long get_board_ddr_clk(void);
/*
* USB
*/
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB

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@ -12,7 +12,7 @@
#define __T2080RDB_H
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_FSL_SATA_V2
/* High Level Configuration Options */
@ -652,7 +652,7 @@ unsigned long get_board_ddr_clk(void);
/*
* USB
*/
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB

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@ -507,7 +507,7 @@ unsigned long get_board_ddr_clk(void);
/*
* USB
*/
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB

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@ -685,7 +685,7 @@ unsigned long get_board_ddr_clk(void);
/*
* USB
*/
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB

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@ -453,11 +453,11 @@
#define CONFIG_HAS_FSL_DR_USB
#if defined(CONFIG_HAS_FSL_DR_USB)
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#ifdef CONFIG_USB_EHCI
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_FSL
#endif

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@ -55,7 +55,7 @@
#define CONFIG_BOUNCE_BUFFER
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

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@ -81,7 +81,7 @@
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_RMOBILE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

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@ -36,7 +36,7 @@
#define CONFIG_SYS_MMC_ENV_PART 1
/* USB host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* PCI host support */

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@ -33,7 +33,7 @@
#define CONFIG_SYS_MMC_ENV_PART 1
/* USB host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* PCI host support */

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@ -202,7 +202,7 @@
#define CONFIG_RTC_M41T11
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */

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@ -51,7 +51,7 @@
#define CONFIG_CMD_NAND
/*
* define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
* NB: in this case, USB 1.1 devices won't be recognized.
*/
@ -99,7 +99,7 @@
/* USB */
#ifdef CONFIG_CMD_USB
#ifndef CONFIG_USB_EHCI
#ifndef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW

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@ -39,7 +39,7 @@
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

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@ -43,7 +43,7 @@
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

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@ -38,7 +38,7 @@
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

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@ -61,7 +61,7 @@
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER

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@ -75,7 +75,7 @@
/* USB */
#define CONFIG_USB_OMAP3
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_USB_MUSB_UDC
#define CONFIG_TWL4030_USB

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@ -84,7 +84,7 @@
#ifndef CONFIG_USB_MUSB_AM35X
#define CONFIG_USB_OMAP3
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147

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@ -58,7 +58,7 @@
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
/* USB UHH support options */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

View File

@ -25,7 +25,7 @@
#define CONFIG_SYS_I2C_TEGRA
/* USB host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3

View File

@ -33,7 +33,7 @@
#define CONFIG_SYS_MMC_ENV_PART 1
/* USB host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

View File

@ -191,7 +191,7 @@
#endif
/* USB Host Support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_VF
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

View File

@ -291,7 +291,7 @@
/*
* USB
*/
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI_FSL

View File

@ -608,7 +608,7 @@
#define CONFIG_HAS_FSL_MPH_USB
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

View File

@ -96,7 +96,7 @@
#define CONFIG_AT91_WANTS_COMMON_PHY
/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2

View File

@ -426,7 +426,7 @@
#define CONFIG_HAS_FSL_MPH_USB
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_EHCI_IS_TDI

View File

@ -35,7 +35,7 @@
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

View File

@ -74,7 +74,7 @@
#endif
#if !defined(CONFIG_USB_XHCI_HCD)
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MARVELL
#define CONFIG_EHCI_IS_TDI
#endif

View File

@ -25,7 +25,7 @@
#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
/* USB UHH support options */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3

View File

@ -33,7 +33,7 @@
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB2.0 Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

View File

@ -15,7 +15,7 @@
#include "tam3517-common.h"
#undef CONFIG_USB_EHCI
#undef CONFIG_USB_EHCI_HCD
#undef CONFIG_USB_EHCI_OMAP
#undef CONFIG_USB_OMAP3

View File

@ -171,7 +171,7 @@
* Common USB/EHCI configuration
*/
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_HCD /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_MARVELL
#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
#define CONFIG_SUPPORT_VFAT

View File

@ -35,7 +35,7 @@
#define CONFIG_SYS_I2C_SPEED 100000
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

View File

@ -26,7 +26,7 @@
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_EXYNOS
#define CONFIG_USB_XHCI_EXYNOS

View File

@ -68,7 +68,7 @@
/* USB Configs */
#ifdef CONFIG_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

View File

@ -78,7 +78,7 @@
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_RMOBILE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

View File

@ -82,7 +82,7 @@
#define CONFIG_ENV_SIZE 0x4000
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_ARMADA100
#define CONFIG_EHCI_IS_TDI
#endif /* CONFIG_CMD_USB */

View File

@ -156,7 +156,7 @@
#define CONFIG_ARP_TIMEOUT 200UL
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

View File

@ -36,7 +36,7 @@
#define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

View File

@ -34,7 +34,7 @@
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

View File

@ -78,7 +78,7 @@
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_RMOBILE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

View File

@ -80,7 +80,7 @@
#define CONFIG_SYS_TMU_CLK_DIV 4
/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_RMOBILE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3

View File

@ -137,7 +137,7 @@
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

View File

@ -115,7 +115,7 @@
/*#define CONFIG_HAS_FSL_DR_USB*/
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

View File

@ -402,7 +402,7 @@ unsigned long get_board_ddr_clk(void);
/*#define CONFIG_HAS_FSL_DR_USB*/
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

View File

@ -40,7 +40,7 @@
/*#define CONFIG_HAS_FSL_DR_USB*/
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif

View File

@ -362,7 +362,7 @@
/*
* USB/EHCI
*/
#define CONFIG_USB_EHCI /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_HCD /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_PPC4XX /* on PPC4xx platform */
#define CONFIG_SYS_PPC4XX_USB_ADDR 0xe0000300
#define CONFIG_EHCI_MMIO_BIG_ENDIAN

View File

@ -162,7 +162,7 @@
* USB
*/
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX5
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

View File

@ -102,7 +102,7 @@
* USB
*/
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3

View File

@ -98,7 +98,7 @@
"128k@0x19C0000(swupdate-kernel-dtb.nor)"
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

View File

@ -29,7 +29,7 @@
#define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */
/* USB host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_TEGRA
/* USB networking support */

View File

@ -369,7 +369,7 @@
*/
#if defined(CONFIG_CMD_USB)
#define CONFIG_USB_EHCI /* Enable EHCI Support */
#define CONFIG_USB_EHCI_HCD /* Enable EHCI Support */
#define CONFIG_USB_EHCI_FSL /* On a FSL platform */
#define CONFIG_EHCI_MMIO_BIG_ENDIAN /* With big-endian regs */
#define CONFIG_EHCI_DESC_BIG_ENDIAN

View File

@ -121,7 +121,7 @@
* Common USB/EHCI configuration
*/
#if defined(CONFIG_CMD_USB) && !defined(CONFIG_DM)
#define CONFIG_USB_EHCI /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_HCD /* Enable EHCI USB support */
#define CONFIG_SUPPORT_VFAT
#endif /* CONFIG_CMD_USB */

View File

@ -199,7 +199,7 @@
#define CONFIG_SYS_NAND_LARGEPAGE
/* EHCI driver */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET

View File

@ -73,7 +73,7 @@
#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX5
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

View File

@ -45,7 +45,7 @@
#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX5
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER

View File

@ -42,7 +42,7 @@
#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX5
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

View File

@ -44,7 +44,7 @@
#define CONFIG_IMX_VIDEO_SKIP
/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)

View File

@ -128,7 +128,7 @@
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER

View File

@ -15,7 +15,7 @@
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

View File

@ -63,7 +63,7 @@
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER

View File

@ -159,7 +159,7 @@
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER

View File

@ -149,7 +149,7 @@
#define CONFIG_PHY_ATHEROS
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_HCD
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER

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