mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
UniPhier SoC updates for v2019.07
- Add SPI pin-mux data for pinctrl driver - Remove unused code - Trivial bug-fix and clean-up -----BEGIN PGP SIGNATURE----- iQJSBAABCgA8FiEEbmPs18K1szRHjPqEPYsBB53g2wYFAl0XafEeHHlhbWFkYS5t YXNhaGlyb0Bzb2Npb25leHQuY29tAAoJED2LAQed4NsG4wgQAI/+kmGqxWiIEdpg QFv1SACIU+h/sWYnAAvyja4bqR8XkQ1mmiSCit/6VGqxIjeR27QnHV9/gEL0Q4Tf 5e/w0MrPBz411K497UITreJBkvTFPPw928OsU7w5uWm5NpXmGlRkIRSB6sP0HNGe 3QOLdTnBWy6W1TMfjSmM9TCpHpJTbOpQS76H2rhT+QMXCwG2n8Z3tjd/soCuFKi5 V9RAAxfkilms5NWWmVlq0LU03Z0BRa2D28TFlmp1zUNnoChG8ty21wNe2Zff1hTM FtuY6Wt+yVjzVUqGnCsYbkKoL2FDTS/3ezfG/VY8EVHDy0pWLZIP7JzwDouFBBu8 KEkNtiLNWfotCcOAFCl6g18xhpKrTRdGnc0M8jpnoH9VHHmIlV75UDkcozEDmOIv HfMJxWo1GN9CYAwkhmkDgv6Rl1hElNvekHdeB0ynZuNLdTZhN+fNrQtGe3A4kmLq rLa5OLJEszrqHmPcy5IOEImM7xVR8mzYBYrR3jvdb6AFM1GVLE3ilExU59ipRvlR QAHDmW/oRFNCVZGxNwt0arG1T54HtVKlDMw+UJejGNYe/I/JplDd+Hq6IaXi0JHp drjkyAVgmzi8pbrR52myAudPI60BkTDQPlTnhgqaNGxB0+xlQUue67meJcGsavxK 33k2b5WhTh+WiHYzgZI87RkQRJnq =VpzL -----END PGP SIGNATURE----- Merge tag 'uniphier-v2019.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier UniPhier SoC updates for v2019.07 - Add SPI pin-mux data for pinctrl driver - Remove unused code - Trivial bug-fix and clean-up
This commit is contained in:
commit
884512f7db
|
@ -16,9 +16,19 @@
|
|||
#include CONFIG_DEBUG_LL_INCLUDE
|
||||
#endif
|
||||
|
||||
#define SG_REVISION_TYPE_SHIFT 16
|
||||
#define SG_REVISION_TYPE_MASK (0xff << SG_REVISION_TYPE_SHIFT)
|
||||
#define BAUDRATE 115200
|
||||
#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d))
|
||||
|
||||
.macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd
|
||||
ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
|
||||
ldr \rd, [\ra]
|
||||
and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
|
||||
orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
|
||||
str \rd, [\ra]
|
||||
.endm
|
||||
|
||||
ENTRY(debug_ll_init)
|
||||
ldr r0, =SG_REVISION
|
||||
ldr r1, [r0]
|
||||
|
|
|
@ -7,8 +7,6 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o
|
|||
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o
|
||||
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o
|
||||
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o
|
||||
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += debug-uart-ld20.o
|
||||
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += debug-uart-ld20.o
|
||||
endif
|
||||
|
||||
obj-y += debug-uart.o
|
||||
|
|
|
@ -1,34 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "../sc64-regs.h"
|
||||
#include "../sg-regs.h"
|
||||
#include "debug-uart.h"
|
||||
|
||||
#define UNIPHIER_LD20_UART_CLK 58820000
|
||||
|
||||
unsigned int uniphier_ld20_debug_uart_init(void)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
sg_set_iectrl(54); /* TXD0 */
|
||||
sg_set_iectrl(58); /* TXD1 */
|
||||
sg_set_iectrl(90); /* TXD2 */
|
||||
sg_set_iectrl(94); /* TXD3 */
|
||||
sg_set_pinsel(54, 0, 8, 4); /* TXD0 -> TXD0 */
|
||||
sg_set_pinsel(58, 1, 8, 4); /* SPITXD1 -> TXD1 */
|
||||
sg_set_pinsel(90, 1, 8, 4); /* PC0WE -> TXD2 */
|
||||
sg_set_pinsel(94, 1, 8, 4); /* PCD00 -> TXD3 */
|
||||
|
||||
tmp = readl(SC_CLKCTRL4);
|
||||
tmp |= SC_CLKCTRL4_PERI;
|
||||
writel(tmp, SC_CLKCTRL4);
|
||||
|
||||
return DIV_ROUND_CLOSEST(UNIPHIER_LD20_UART_CLK, 16 * CONFIG_BAUDRATE);
|
||||
}
|
|
@ -8,6 +8,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/serial_reg.h>
|
||||
|
||||
#include "../sg-regs.h"
|
||||
#include "../soc-info.h"
|
||||
#include "debug-uart.h"
|
||||
|
||||
|
@ -26,8 +27,36 @@ static void _debug_uart_putc(int c)
|
|||
writel(c, base + UNIPHIER_UART_TX);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
void sg_set_pinsel(unsigned int pin, unsigned int muxval,
|
||||
unsigned int mux_bits, unsigned int reg_stride)
|
||||
{
|
||||
unsigned int shift = pin * mux_bits % 32;
|
||||
unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
|
||||
u32 mask = (1U << mux_bits) - 1;
|
||||
u32 tmp;
|
||||
|
||||
tmp = readl(reg);
|
||||
tmp &= ~(mask << shift);
|
||||
tmp |= (mask & muxval) << shift;
|
||||
writel(tmp, reg);
|
||||
}
|
||||
|
||||
void sg_set_iectrl(unsigned int pin)
|
||||
{
|
||||
unsigned int bit = pin % 32;
|
||||
unsigned long reg = SG_IECTRL + pin / 32 * 4;
|
||||
u32 tmp;
|
||||
|
||||
tmp = readl(reg);
|
||||
tmp |= 1 << bit;
|
||||
writel(tmp, reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
void _debug_uart_init(void)
|
||||
{
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
|
||||
unsigned int divisor;
|
||||
|
||||
|
@ -61,12 +90,6 @@ void _debug_uart_init(void)
|
|||
case UNIPHIER_LD6B_ID:
|
||||
divisor = uniphier_ld6b_debug_uart_init();
|
||||
break;
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
|
||||
case UNIPHIER_LD11_ID:
|
||||
case UNIPHIER_LD20_ID:
|
||||
divisor = uniphier_ld20_debug_uart_init();
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return;
|
||||
|
@ -75,5 +98,6 @@ void _debug_uart_init(void)
|
|||
writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR);
|
||||
|
||||
writel(divisor, base + UNIPHIER_UART_LDR);
|
||||
#endif
|
||||
}
|
||||
DEBUG_UART_FUNCS
|
||||
|
|
|
@ -12,7 +12,9 @@ unsigned int uniphier_sld8_debug_uart_init(void);
|
|||
unsigned int uniphier_pro5_debug_uart_init(void);
|
||||
unsigned int uniphier_pxs2_debug_uart_init(void);
|
||||
unsigned int uniphier_ld6b_debug_uart_init(void);
|
||||
unsigned int uniphier_ld11_debug_uart_init(void);
|
||||
unsigned int uniphier_ld20_debug_uart_init(void);
|
||||
|
||||
void sg_set_pinsel(unsigned int pin, unsigned int muxval,
|
||||
unsigned int mux_bits, unsigned int reg_stride);
|
||||
void sg_set_iectrl(unsigned int pin);
|
||||
|
||||
#endif /* _MACH_DEBUG_UART_H */
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
|
||||
#include <common.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/printk.h>
|
||||
#include <linux/sizes.h>
|
||||
|
|
|
@ -12,10 +12,6 @@
|
|||
|
||||
#define SC_BASE_ADDR 0x61840000
|
||||
|
||||
#define SC_DPLLOSCCTRL (SC_BASE_ADDR | 0x1110)
|
||||
#define SC_DPLLOSCCTRL_DPLLST (0x1 << 1)
|
||||
#define SC_DPLLOSCCTRL_DPLLEN (0x1 << 0)
|
||||
|
||||
#define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200)
|
||||
#define SC_DPLLCTRL_SSC_EN (0x1 << 31)
|
||||
#define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16)
|
||||
|
|
|
@ -87,54 +87,4 @@
|
|||
#define SG_PINMON0_CLK_MODE_AXOSEL_20480KHZ (0x2 << 16)
|
||||
#define SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_A (0x3 << 16)
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
|
||||
.macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd
|
||||
ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
|
||||
ldr \rd, [\ra]
|
||||
and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
|
||||
orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
|
||||
str \rd, [\ra]
|
||||
.endm
|
||||
|
||||
#else
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
static inline void sg_set_pinsel(unsigned pin, unsigned muxval,
|
||||
unsigned mux_bits, unsigned reg_stride)
|
||||
{
|
||||
unsigned shift = pin * mux_bits % 32;
|
||||
unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
|
||||
u32 mask = (1U << mux_bits) - 1;
|
||||
u32 tmp;
|
||||
|
||||
tmp = readl(reg);
|
||||
tmp &= ~(mask << shift);
|
||||
tmp |= (mask & muxval) << shift;
|
||||
writel(tmp, reg);
|
||||
}
|
||||
|
||||
static inline void sg_set_iectrl(unsigned pin)
|
||||
{
|
||||
unsigned bit = pin % 32;
|
||||
unsigned long reg = SG_IECTRL + pin / 32 * 4;
|
||||
u32 tmp;
|
||||
|
||||
tmp = readl(reg);
|
||||
tmp |= 1 << bit;
|
||||
writel(tmp, reg);
|
||||
}
|
||||
|
||||
static inline void sg_set_iectrl_range(unsigned min, unsigned max)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = min; i <= max; i++)
|
||||
sg_set_iectrl(i);
|
||||
}
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* UNIPHIER_SG_REGS_H */
|
||||
|
|
|
@ -28,6 +28,10 @@ static const int i2c4_muxvals[] = {1, 1};
|
|||
static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
|
||||
15, 16, 17};
|
||||
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned spi0_pins[] = {56, 57, 58, 59};
|
||||
static const int spi0_muxvals[] = {0, 0, 0, 0};
|
||||
static const unsigned spi1_pins[] = {169, 170, 171, 172};
|
||||
static const int spi1_muxvals[] = {1, 1, 1, 1};
|
||||
static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13,
|
||||
14, 15, 16, 17};
|
||||
static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
|
||||
|
@ -58,6 +62,8 @@ static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(i2c3),
|
||||
UNIPHIER_PINCTRL_GROUP(i2c4),
|
||||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(spi1),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(uart0),
|
||||
|
@ -77,6 +83,8 @@ static const char * const uniphier_ld11_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c3),
|
||||
UNIPHIER_PINMUX_FUNCTION(i2c4),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi1),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION(uart1),
|
||||
|
|
|
@ -43,6 +43,14 @@ static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
|
|||
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17};
|
||||
static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */
|
||||
static const unsigned spi0_pins[] = {56, 57, 58, 59};
|
||||
static const int spi0_muxvals[] = {0, 0, 0, 0};
|
||||
static const unsigned spi1_pins[] = {169, 170, 171, 172};
|
||||
static const int spi1_muxvals[] = {1, 1, 1, 1};
|
||||
static const unsigned spi2_pins[] = {86, 87, 88, 89};
|
||||
static const int spi2_muxvals[] = {1, 1, 1, 1};
|
||||
static const unsigned spi3_pins[] = {74, 75, 76, 77};
|
||||
static const int spi3_muxvals[] = {1, 1, 1, 1};
|
||||
static const unsigned system_bus_pins[] = {1, 2, 6, 7, 8, 9, 10, 11, 12, 13,
|
||||
14, 15, 16, 17};
|
||||
static const int system_bus_muxvals[] = {0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
|
||||
|
@ -77,6 +85,10 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(i2c4),
|
||||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(spi1),
|
||||
UNIPHIER_PINCTRL_GROUP(spi2),
|
||||
UNIPHIER_PINCTRL_GROUP(spi3),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(uart0),
|
||||
|
@ -99,6 +111,10 @@ static const char * const uniphier_ld20_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c4),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi1),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi2),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi3),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION(uart1),
|
||||
|
|
|
@ -37,6 +37,8 @@ static const unsigned nand_cs1_pins[] = {22, 23};
|
|||
static const int nand_cs1_muxvals[] = {0, 0};
|
||||
static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52};
|
||||
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned spi0_pins[] = {135, 136, 137, 138};
|
||||
static const int spi0_muxvals[] = {12, 12, 12, 12};
|
||||
static const unsigned system_bus_pins[] = {16, 17, 18, 19, 20, 165, 166, 167,
|
||||
168, 169, 170, 171, 172, 173};
|
||||
static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1,
|
||||
|
@ -80,6 +82,7 @@ static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(nand_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
|
@ -106,6 +109,7 @@ static const char * const uniphier_ld4_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c3),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
|
||||
|
|
|
@ -37,6 +37,10 @@ static const unsigned nand_cs1_pins[] = {37, 38};
|
|||
static const int nand_cs1_muxvals[] = {0, 0};
|
||||
static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};
|
||||
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned spi0_pins[] = {199, 200, 201, 202};
|
||||
static const int spi0_muxvals[] = {8, 8, 8, 8};
|
||||
static const unsigned spi1_pins[] = {93, 94, 95, 96};
|
||||
static const int spi1_muxvals[] = {1, 1, 1, 1};
|
||||
static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
|
||||
11, 12, 13};
|
||||
static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
@ -84,6 +88,8 @@ static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(nand_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(spi1),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
|
||||
|
@ -112,6 +118,8 @@ static const char * const uniphier_ld6b_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c3),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi1),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
|
||||
|
|
|
@ -50,6 +50,10 @@ static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
|
|||
static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326,
|
||||
327};
|
||||
static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned spi0_pins[] = {199, 200, 201, 202};
|
||||
static const int spi0_muxvals[] = {11, 11, 11, 11};
|
||||
static const unsigned spi1_pins[] = {195, 196, 197, 198, 235, 238, 239};
|
||||
static const int spi1_muxvals[] = {11, 11, 11, 11, 11, 11, 11};
|
||||
static const unsigned system_bus_pins[] = {25, 26, 27, 28, 29, 30, 31, 32, 33,
|
||||
34, 35, 36, 37, 38};
|
||||
static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
@ -103,6 +107,8 @@ static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(nand_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(sd1),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(spi1),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
|
@ -135,6 +141,8 @@ static const char * const uniphier_pro4_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd1),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi1),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
|
||||
|
|
|
@ -37,6 +37,12 @@ static const unsigned nand_cs1_pins[] = {26, 27};
|
|||
static const int nand_cs1_muxvals[] = {0, 0};
|
||||
static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258};
|
||||
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned spi0_pins[] = {120, 121, 122, 123};
|
||||
static const int spi0_muxvals[] = {0, 0, 0, 0};
|
||||
static const unsigned spi1_pins[] = {134, 139, 85, 86};
|
||||
static const int spi1_muxvals[] = {1, 1, 1, 1};
|
||||
static const unsigned spi2_pins[] = {55, 56, 57, 58, 82, 83, 84};
|
||||
static const int spi2_muxvals[] = {0, 0, 0, 0, 1, 1, 1};
|
||||
static const unsigned system_bus_pins[] = {4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
|
||||
14, 15, 16, 17};
|
||||
static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
@ -88,6 +94,9 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(nand_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(spi1),
|
||||
UNIPHIER_PINCTRL_GROUP(spi2),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
|
@ -117,6 +126,9 @@ static const char * const uniphier_pro5_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c6),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi1),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi2),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
|
||||
|
|
|
@ -46,6 +46,10 @@ static const unsigned nand_cs1_pins[] = {37, 38};
|
|||
static const int nand_cs1_muxvals[] = {8, 8};
|
||||
static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};
|
||||
static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8};
|
||||
static const unsigned spi0_pins[] = {199, 200, 201, 202};
|
||||
static const int spi0_muxvals[] = {8, 8, 8, 8};
|
||||
static const unsigned spi1_pins[] = {93, 94, 95, 96};
|
||||
static const int spi1_muxvals[] = {1, 1, 1, 1};
|
||||
static const unsigned system_bus_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
|
||||
11, 12, 13};
|
||||
static const int system_bus_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
|
||||
|
@ -88,6 +92,8 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(nand_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(spi1),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
|
||||
|
@ -115,6 +121,8 @@ static const char * const uniphier_pxs2_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c6),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi1),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
|
||||
|
|
|
@ -41,6 +41,10 @@ static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
|
|||
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51};
|
||||
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned spi0_pins[] = {100, 101, 102, 103};
|
||||
static const int spi0_muxvals[] = {0, 0, 0, 0};
|
||||
static const unsigned spi1_pins[] = {112, 113, 114, 115};
|
||||
static const int spi1_muxvals[] = {2, 2, 2, 2};
|
||||
static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
|
||||
12, 13, 14};
|
||||
static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
@ -77,6 +81,8 @@ static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(i2c3),
|
||||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(spi1),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(uart0),
|
||||
|
@ -101,6 +107,8 @@ static const char * const uniphier_pxs3_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c3),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi1),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION(uart1),
|
||||
|
|
|
@ -37,6 +37,8 @@ static const unsigned nand_cs1_pins[] = {22, 23};
|
|||
static const int nand_cs1_muxvals[] = {0, 0};
|
||||
static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40};
|
||||
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
static const unsigned spi0_pins[] = {118, 119, 120, 121};
|
||||
static const int spi0_muxvals[] = {3, 3, 3, 3};
|
||||
static const unsigned system_bus_pins[] = {136, 137, 138, 139, 140, 141, 142,
|
||||
143, 144, 145, 146, 147, 148, 149};
|
||||
static const int system_bus_muxvals[] = {-1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
|
@ -78,6 +80,7 @@ static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = {
|
|||
UNIPHIER_PINCTRL_GROUP(nand),
|
||||
UNIPHIER_PINCTRL_GROUP(nand_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(sd),
|
||||
UNIPHIER_PINCTRL_GROUP(spi0),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
|
||||
UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
|
||||
|
@ -103,6 +106,7 @@ static const char * const uniphier_sld8_functions[] = {
|
|||
UNIPHIER_PINMUX_FUNCTION(i2c3),
|
||||
UNIPHIER_PINMUX_FUNCTION(nand),
|
||||
UNIPHIER_PINMUX_FUNCTION(sd),
|
||||
UNIPHIER_PINMUX_FUNCTION(spi0),
|
||||
UNIPHIER_PINMUX_FUNCTION(system_bus),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
|
||||
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
|
||||
|
|
Loading…
Reference in New Issue
Block a user