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https://github.com/brain-hackers/u-boot-brain
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configs: remove CONFIG_SYS_DSPI_XX references
This patch removes CONFIG_SYS_DSPI_XX options from include/configs "m68k" .h board files, since CTAR registers are now set with default values in the cf_spi driver initialization, and configurable by devicetree. Note, these options cannot be totally removed from the whitelist, since still used from boards using fsl_dspi.c (mostly arm-based boards). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Angelo Dureghello <angelo@sysam.it>
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@ -103,17 +103,6 @@
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/* DSPI and Serial Flash */
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#define CONFIG_CF_DSPI
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#define CONFIG_SYS_SBFHDR_SIZE 0x7
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#ifdef CONFIG_CMD_SPI
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# define CONFIG_SYS_DSPI_CS2
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# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
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DSPI_CTAR_PCSSCK_1CLK | \
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DSPI_CTAR_PASC(0) | \
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DSPI_CTAR_PDT(0) | \
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DSPI_CTAR_CSSCK(0) | \
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DSPI_CTAR_ASC(0) | \
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DSPI_CTAR_DT(1))
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#endif
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/* Input, PCI, Flexbus, and VCO */
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#define CONFIG_EXTRA_CLOCK
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@ -152,18 +152,6 @@
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#define CONFIG_CF_DSPI
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#define CONFIG_SERIAL_FLASH
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#define CONFIG_SYS_SBFHDR_SIZE 0x7
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#ifdef CONFIG_CMD_SPI
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# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
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DSPI_CTAR_PCSSCK_1CLK | \
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DSPI_CTAR_PASC(0) | \
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DSPI_CTAR_PDT(0) | \
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DSPI_CTAR_CSSCK(0) | \
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DSPI_CTAR_ASC(0) | \
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DSPI_CTAR_DT(1))
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# define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
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# define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
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#endif
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/* Input, PCI, Flexbus, and VCO */
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#define CONFIG_EXTRA_CLOCK
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@ -117,18 +117,6 @@
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#define CONFIG_CF_DSPI
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#define CONFIG_SERIAL_FLASH
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#define CONFIG_SYS_SBFHDR_SIZE 0x7
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#ifdef CONFIG_CMD_SPI
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# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
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DSPI_CTAR_PCSSCK_1CLK | \
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DSPI_CTAR_PASC(0) | \
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DSPI_CTAR_PDT(0) | \
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DSPI_CTAR_CSSCK(0) | \
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DSPI_CTAR_ASC(0) | \
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DSPI_CTAR_DT(1))
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# define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
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# define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
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#endif
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/* Input, PCI, Flexbus, and VCO */
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#define CONFIG_EXTRA_CLOCK
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@ -143,16 +143,6 @@
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/* DSPI and Serial Flash */
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#define CONFIG_CF_DSPI
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#define CONFIG_SYS_SBFHDR_SIZE 0x13
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#ifdef CONFIG_CMD_SPI
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# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
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DSPI_CTAR_PCSSCK_1CLK | \
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DSPI_CTAR_PASC(0) | \
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DSPI_CTAR_PDT(0) | \
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DSPI_CTAR_CSSCK(0) | \
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DSPI_CTAR_ASC(0) | \
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DSPI_CTAR_DT(1))
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#endif
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/* PCI */
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#ifdef CONFIG_CMD_PCI
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@ -68,17 +68,6 @@
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#define CONFIG_SYS_SBFHDR_SIZE 0x7
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#define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
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DSPI_CTAR_PCSSCK_1CLK | \
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DSPI_CTAR_PASC(0) | \
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DSPI_CTAR_PDT(0) | \
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DSPI_CTAR_CSSCK(0) | \
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DSPI_CTAR_ASC(0) | \
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DSPI_CTAR_DT(1) | \
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DSPI_CTAR_BR(6))
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#define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
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#define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
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/* Input, PCI, Flexbus, and VCO */
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#define CONFIG_EXTRA_CLOCK
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