configs: Disable now unbuildable SPI options for boards

Now that various SPI related options depend on CONFIG_DEPRECATED, in
order for platforms to build out of the box they need to disable various
other options.

Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Cc: Marek Vasut <marex@denx.de>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Tom Rini 2019-05-29 17:01:36 -04:00 committed by Jagan Teki
parent ea73ec08d1
commit 88369d33e3
18 changed files with 21 additions and 71 deletions

View File

@ -174,6 +174,7 @@ int board_mmc_init(bd_t *bis)
static int get_sh_eth_mac_raw(unsigned char *buf, int size)
{
#ifdef CONFIG_DEPRECATED
struct spi_flash *spi;
int ret;
@ -190,6 +191,7 @@ static int get_sh_eth_mac_raw(unsigned char *buf, int size)
return 1;
}
spi_flash_free(spi);
#endif
return 0;
}
@ -239,6 +241,7 @@ int board_late_init(void)
return 0;
}
#ifdef CONFIG_DEPRECATED
int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i, ret;
@ -302,3 +305,4 @@ U_BOOT_CMD(
"write MAC address for GETHERC",
"[GETHERC ch0] [GETHERC ch1]\n"
);
#endif

View File

@ -190,6 +190,7 @@ int board_mmc_init(bd_t *bis)
static int get_sh_eth_mac_raw(unsigned char *buf, int size)
{
#ifdef CONFIG_DEPRECATED
struct spi_flash *spi;
int ret;
@ -206,6 +207,7 @@ static int get_sh_eth_mac_raw(unsigned char *buf, int size)
return 1;
}
spi_flash_free(spi);
#endif
return 0;
}
@ -255,6 +257,7 @@ int board_late_init(void)
return 0;
}
#ifdef CONFIG_DEPRECATED
int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i, ret;
@ -318,3 +321,4 @@ U_BOOT_CMD(
"write MAC address for GETHERC",
"[GETHERC ch0] [GETHERC ch1]\n"
);
#endif

View File

@ -30,6 +30,7 @@ static void init_gctrl(void)
static int init_pcie_bridge_from_spi(void *buf, size_t size)
{
#ifdef CONFIG_DEPRECATED
struct spi_flash *spi;
int ret;
unsigned long pcie_addr;
@ -54,6 +55,10 @@ static int init_pcie_bridge_from_spi(void *buf, size_t size)
spi_flash_free(spi);
return 0;
#else
printf("No SPI support so no PCIe support\n");
return 1;
#endif
}
static void init_pcie_bridge(void)
@ -231,6 +236,7 @@ int board_mmc_init(bd_t *bis)
static int get_sh_eth_mac_raw(unsigned char *buf, int size)
{
#ifdef CONFIG_DEPRECATED
struct spi_flash *spi;
int ret;
@ -247,6 +253,7 @@ static int get_sh_eth_mac_raw(unsigned char *buf, int size)
return 1;
}
spi_flash_free(spi);
#endif
return 0;
}
@ -352,6 +359,7 @@ U_BOOT_CMD(
"enable SH-G200 bus (disable PCIe-G200)"
);
#ifdef CONFIG_DEPRECATED
int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i, ret;
@ -418,3 +426,4 @@ U_BOOT_CMD(
"write MAC address for ETHERC/GETHERC",
"[ETHERC ch0] [ETHERC ch1] [GETHERC ch0] [GETHERC ch1]\n"
);
#endif

View File

@ -6,5 +6,6 @@
ifdef CONFIG_SPL_BUILD
obj-y += work_92105_spl.o
else
obj-y += work_92105.o work_92105_display.o
obj-y += work_92105.o
obj-$(CONFIG_DEPRECATED) += work_92105_display.o
endif

View File

@ -52,8 +52,10 @@ int board_early_init_r(void)
gpio_request(GPO_19, "NAND_nWP");
gpio_direction_output(GPO_19, 1);
#ifdef CONFIG_DEPRECATED
/* initialize display */
work_92105_display_init();
#endif
return 0;
}

View File

@ -22,9 +22,6 @@ CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=2
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@ -33,13 +30,7 @@ CONFIG_DOS_PARTITION=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SPI=y
CONFIG_MXS_SPI=y
CONFIG_OF_LIBFDT=y

View File

@ -22,7 +22,6 @@ CONFIG_CMD_IMLS=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@ -45,7 +44,6 @@ CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ADDR=31
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_LPC32XX_SSP=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y

View File

@ -22,9 +22,6 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=2
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@ -44,15 +41,9 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_MXS=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_SST=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SPI=y
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

View File

@ -22,9 +22,6 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=2
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@ -44,15 +41,9 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_MMC_MXS=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_SST=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SPI=y
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

View File

@ -21,9 +21,6 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=2
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@ -43,15 +40,9 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_MXS=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_SST=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SPI=y
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

View File

@ -21,9 +21,6 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=2
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@ -39,19 +36,12 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:3m(bootloader)ro,512k(environment),512k(redundant-environment),4m(kernel),512k(fdt),8m(ramdisk),-(filesystem)"
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_MMC_MXS=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_SST=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SPI=y
CONFIG_MXS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

View File

@ -18,7 +18,6 @@ CONFIG_CMD_MD5SUM=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@ -29,14 +28,9 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_MMC=y
CONFIG_SH_MMCIF=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_SH_SPI=y
CONFIG_USE_PRIVATE_LIBGCC=y

View File

@ -17,7 +17,6 @@ CONFIG_CMD_MD5SUM=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@ -28,14 +27,9 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_MMC=y
CONFIG_SH_MMCIF=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_SH_SPI=y
CONFIG_USE_PRIVATE_LIBGCC=y

View File

@ -20,7 +20,6 @@ CONFIG_CMD_MD5SUM=y
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@ -31,13 +30,9 @@ CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_MAC_PARTITION=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_MMC=y
CONFIG_SH_MMCIF=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_SH_SPI=y
CONFIG_USE_PRIVATE_LIBGCC=y

View File

@ -28,7 +28,6 @@ CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@ -41,4 +40,3 @@ CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_LPC32XX_SSP=y

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@ -63,7 +63,6 @@
#define CONFIG_SH_MMCIF_CLK 48000000
/* ENV setting */
#define CONFIG_ENV_IS_EMBEDDED
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_ADDR (0x00080000)
#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)

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@ -63,7 +63,6 @@
#define CONFIG_SH_MMCIF_CLK 48000000
/* ENV setting */
#define CONFIG_ENV_IS_EMBEDDED
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_ADDR (0x00080000)
#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)

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@ -75,7 +75,6 @@
#define SH7757LCR_PCIEBRG_SIZE (96 * 1024)
/* ENV setting */
#define CONFIG_ENV_IS_EMBEDDED
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_ADDR (0x00080000)
#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)