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powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080)

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CoreNet Platform Cache single-bit data error scrubbing will cause data
corruption.  Disable the feature to workaround the issue.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2011-01-13 01:56:18 -06:00
parent 1d2c2a62e3
commit 868da5936e
4 changed files with 8 additions and 0 deletions
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3
arch/powerpc/cpu/mpc85xx/cmd_errata.c
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@ -62,6 +62,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002 #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
puts("Work-around for Erratum CPC-A002 enabled\n"); puts("Work-around for Erratum CPC-A002 enabled\n");
#endif #endif
#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003
puts("Work-around for Erratum CPC-A003 enabled\n");
#endif
return 0; return 0;
} }

3
arch/powerpc/cpu/mpc85xx/cpu_init.c
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@ -145,6 +145,9 @@ static void enable_cpc(void)
#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002 #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS); setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS);
#endif #endif
#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003
setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_DATA_ECC_SCRUB_DIS);
#endif
out_be32(&cpc->cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE); out_be32(&cpc->cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE);
/* Read back to sync write */ /* Read back to sync write */

1
arch/powerpc/include/asm/immap_85xx.h
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@ -1620,6 +1620,7 @@ typedef struct cpc_corenet {
#define CPC_ERRDIS_TMHITDIS 0x00000080 /* multi-way hit disable */ #define CPC_ERRDIS_TMHITDIS 0x00000080 /* multi-way hit disable */
#define CPC_HDBCR0_CDQ_SPEC_DIS 0x08000000 #define CPC_HDBCR0_CDQ_SPEC_DIS 0x08000000
#define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x01000000 #define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x01000000
#define CPC_HDBCR0_DATA_ECC_SCRUB_DIS 0x00400000
#endif /* CONFIG_SYS_FSL_CPC */ #endif /* CONFIG_SYS_FSL_CPC */
/* Global Utilities Block */ /* Global Utilities Block */

1
include/configs/P4080DS.h
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@ -41,6 +41,7 @@
#define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_CPU22
#define CONFIG_SYS_FSL_ERRATUM_CPC_A002 #define CONFIG_SYS_FSL_ERRATUM_CPC_A002
#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
#define CONFIG_SYS_P4080_ERRATUM_SERDES8 #define CONFIG_SYS_P4080_ERRATUM_SERDES8
#include "corenet_ds.h" #include "corenet_ds.h"