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misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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@ -130,4 +130,12 @@ config RESET
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effect a reset. The uclass will try all available drivers when
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effect a reset. The uclass will try all available drivers when
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reset_walk() is called.
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reset_walk() is called.
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config WINBOND_W83627
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bool "Enable Winbond Super I/O driver"
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help
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If you say Y here, you will get support for the Winbond
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W83627 Super I/O driver. This can be used to enable the
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legacy UART or other devices in the Winbond Super IO chips
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on X86 platforms.
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endmenu
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endmenu
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@ -41,3 +41,4 @@ obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
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obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
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obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
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obj-$(CONFIG_RESET) += reset-uclass.o
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obj-$(CONFIG_RESET) += reset-uclass.o
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obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
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obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
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obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
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41
drivers/misc/winbond_w83627.c
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41
drivers/misc/winbond_w83627.c
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/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/pnp_def.h>
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#define WINBOND_ENTRY_KEY 0x87
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#define WINBOND_EXIT_KEY 0xaa
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/* Enable configuration: pass entry key '0x87' into index port dev twice */
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static void pnp_enter_conf_state(u16 dev)
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{
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u16 port = dev >> 8;
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outb(WINBOND_ENTRY_KEY, port);
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outb(WINBOND_ENTRY_KEY, port);
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}
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/* Disable configuration: pass exit key '0xAA' into index port dev */
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static void pnp_exit_conf_state(u16 dev)
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{
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u16 port = dev >> 8;
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outb(WINBOND_EXIT_KEY, port);
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}
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/* Bring up early serial debugging output before the RAM is initialized */
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void winbond_enable_serial(uint dev, uint iobase, uint irq)
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{
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pnp_enter_conf_state(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_irq(dev, PNP_IDX_IRQ0, irq);
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pnp_set_enable(dev, 1);
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pnp_exit_conf_state(dev);
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}
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35
include/winbond_w83627.h
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35
include/winbond_w83627.h
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/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _WINBOND_W83627_H_
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#define _WINBOND_W83627_H_
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/* I/O address of Winbond Super IO chip */
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#define WINBOND_IO_PORT 0x2e
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/* Logical device number */
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#define W83627DHG_FDC 0 /* Floppy */
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#define W83627DHG_PP 1 /* Parallel port */
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#define W83627DHG_SP1 2 /* Com1 */
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#define W83627DHG_SP2 3 /* Com2 */
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#define W83627DHG_KBC 5 /* PS/2 keyboard & mouse */
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#define W83627DHG_SPI 6 /* Serial peripheral interface */
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#define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */
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#define W83627DHG_ACPI 10 /* ACPI */
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#define W83627DHG_HWM 11 /* Hardware monitor */
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#define W83627DHG_PECI_SST 12 /* PECI, SST */
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/**
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* Configure the base I/O port of the specified serial device and enable the
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* serial device.
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*
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* @dev: high 8 bits = super I/O port, low 8 bits = logical device number
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* @iobase: processor I/O port address to assign to this serial device
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* @irq: processor IRQ number to assign to this serial device
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*/
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void winbond_enable_serial(uint dev, uint iobase, uint irq);
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#endif /* _WINBOND_W83627_H_ */
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