From ec8b75281b6205b945de75ae6a360e7254ab8677 Mon Sep 17 00:00:00 2001 From: Chin Liang See Date: Wed, 24 Feb 2016 16:50:22 +0800 Subject: [PATCH 1/4] arm: socfpga: Enabling U-Boot environment support in QSPI Enabling the support of storing U-Boot environment within serial NOR flash. By default, its still store into SDMMC Signed-off-by: Chin Liang See Cc: Dinh Nguyen Cc: Dinh Nguyen Cc: Pavel Machek Cc: Marek Vasut Cc: Stefan Roese --- include/configs/socfpga_common.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index cd48c9e1ca..7b5fe606fd 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -292,6 +292,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ #endif +/* Environment for QSPI boot */ +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET) +#define CONFIG_ENV_OFFSET 0x00100000 +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#endif + /* * mtd partitioning for serial NOR flash * From b72041ccf8d26a1c530f69418a385f03e0b71984 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 26 Feb 2016 19:11:30 +0100 Subject: [PATCH 2/4] arm: socfpga: Fix SR1500 env position Move the inclusion of the common socfpga configuration file further down in the sr1500 configuration, so that the socfpga_common.h can check if environment is in SPI NOR and it's location is defined and if it is not, define default location. This fixes "arm: socfpga: Enabling U-Boot environment support in QSPI" which introduced a minor warning. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Dinh Nguyen Cc: Pavel Machek Cc: Marek Vasut Cc: Stefan Roese --- include/configs/socfpga_sr1500.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index fdf67ca098..e4aafaafc3 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -92,13 +92,6 @@ #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfffffff8 #define CONFIG_SYS_BOOTCOUNT_BE -/* The rest of the configuration is shared */ -#include - -/* U-Boot payload is stored at offset 0x60000 */ -#undef CONFIG_SYS_SPI_U_BOOT_OFFS -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x60000 - /* Environment setting for SPI flash */ #undef CONFIG_ENV_SIZE #define CONFIG_SYS_REDUNDAND_ENVIRONMENT @@ -111,4 +104,11 @@ #define CONFIG_ENV_SPI_MODE SPI_MODE_3 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +/* The rest of the configuration is shared */ +#include + +/* U-Boot payload is stored at offset 0x60000 */ +#undef CONFIG_SYS_SPI_U_BOOT_OFFS +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x60000 + #endif /* __CONFIG_SOCFPGA_SR1500_H__ */ From ead2fb29e8fc3752e844d5ff4f9e668b42a4e744 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 3 Mar 2016 16:57:38 +0100 Subject: [PATCH 3/4] arm: socfpga: Allow boards to define a custom environment size This patch makes it possible that boards can define a board-specific env size. This is used by the SR1500 SoCFPGA board port. Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Marek Vasut --- include/configs/socfpga_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 7b5fe606fd..56d32e6b53 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -284,7 +284,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE +#if !defined(CONFIG_ENV_SIZE) #define CONFIG_ENV_SIZE 4096 +#endif /* Environment for SDMMC boot */ #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET) From 93d9fc26cb7b4fcbb849e79d21d16b114e4501a9 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 3 Mar 2016 16:57:39 +0100 Subject: [PATCH 4/4] arm: socfpga: sr1500: Misc updates (SPI speed, env location) This patch makes the following changes to the SR1500 board port: - Update defconfig to support SPI NOR (use make savedefconfig). - Increase SPI speed to a maximum of 100MHz for faster system bootup. - Change environment location, so that its not between SPL and main U-Boot. This way the combined SPL / U-Boot image can be used for updates. Signed-off-by: Stefan Roese Cc: Marek Vasut --- arch/arm/dts/socfpga_cyclone5_sr1500.dts | 2 +- configs/socfpga_sr1500_defconfig | 2 ++ include/configs/socfpga_sr1500.h | 19 ++++++++++++------- 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts b/arch/arm/dts/socfpga_cyclone5_sr1500.dts index 3729ca02cd..32c6aad30d 100644 --- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts +++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts @@ -88,7 +88,7 @@ #size-cells = <1>; compatible = "n25q00", "spi-flash"; reg = <0>; /* chip select */ - spi-max-frequency = <50000000>; + spi-max-frequency = <100000000>; m25p,fast-read; page-size = <256>; block-size = <16>; /* 2^16, 64KB */ diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 59a6be497e..d499a14bac 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -15,7 +15,9 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y CONFIG_DM_MMC=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y +CONFIG_CADENCE_QSPI=y diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index e4aafaafc3..6414eeb914 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -93,22 +93,27 @@ #define CONFIG_SYS_BOOTCOUNT_BE /* Environment setting for SPI flash */ -#undef CONFIG_ENV_SIZE #define CONFIG_SYS_REDUNDAND_ENVIRONMENT #define CONFIG_ENV_SECT_SIZE (64 * 1024) #define CONFIG_ENV_SIZE (16 * 1024) -#define CONFIG_ENV_OFFSET 0x00040000 +#define CONFIG_ENV_OFFSET 0x000e0000 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_MODE SPI_MODE_3 -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SPI_MAX_HZ 100000000 /* Use max of 100MHz */ +#define CONFIG_SF_DEFAULT_SPEED 100000000 + +/* + * The QSPI NOR flash layout on SR1500: + * + * 0000.0000 - 0003.ffff: SPL (4 times) + * 0004.0000 - 000d.ffff: U-Boot + * 000e.0000 - 000e.ffff: env1 + * 000f.0000 - 000f.ffff: env2 + */ /* The rest of the configuration is shared */ #include -/* U-Boot payload is stored at offset 0x60000 */ -#undef CONFIG_SYS_SPI_U_BOOT_OFFS -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x60000 - #endif /* __CONFIG_SOCFPGA_SR1500_H__ */