85xx: Move LAW init code into C

Move the initialization of the LAWs into C code and provide an API
to allow modification of LAWs after init.

Board code is responsible to provide a law_table and num_law_entries.

We should be able to use the same code on 86xx as well.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2008-01-16 01:13:58 -06:00
parent 4c9e98ace7
commit 83d40dfd79
6 changed files with 169 additions and 0 deletions

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@ -31,6 +31,7 @@
#include <asm/processor.h>
#include <ioports.h>
#include <asm/io.h>
#include <asm/fsl_law.h>
DECLARE_GLOBAL_DATA_PTR;
@ -140,6 +141,9 @@ void cpu_init_f (void)
/* Clear initial global data */
memset ((void *) gd, 0, sizeof (gd_t));
#ifdef CONFIG_FSL_LAW
init_laws();
#endif
#ifdef CONFIG_CPM2
config_8560_ioports((ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR);
@ -222,11 +226,15 @@ void cpu_init_f (void)
int cpu_init_r(void)
{
#ifdef CONFIG_CLEAR_LAW0
#ifdef CONFIG_FSL_LAW
disable_law(0);
#else
volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
/* clear alternate boot location LAW (used for sdram, or ddr bank) */
ecm->lawar0 = 0;
#endif
#endif
#if defined(CONFIG_L2_CACHE)
volatile ccsr_l2cache_t *l2cache = (void *)CFG_MPC85xx_L2_ADDR;

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@ -27,6 +27,7 @@
#include <i2c.h>
#include <spd.h>
#include <asm/mmu.h>
#include <asm/fsl_law.h>
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
@ -1022,7 +1023,9 @@ spd_sdram(void)
static unsigned int
setup_laws_and_tlbs(unsigned int memsize)
{
#ifndef CONFIG_FSL_LAW
volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
#endif
unsigned int tlb_size;
unsigned int law_size;
unsigned int ram_tlb_index;
@ -1098,12 +1101,17 @@ setup_laws_and_tlbs(unsigned int memsize)
/*
* Set up LAWBAR for all of DDR.
*/
#ifdef CONFIG_FSL_LAW
set_law(1, CFG_DDR_SDRAM_BASE, law_size, LAW_TRGT_IF_DDR);
#else
ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff);
ecm->lawar1 = (LAWAR_EN
| LAWAR_TRGT_IF_DDR
| (LAWAR_SIZE & law_size));
debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1);
debug("DDR: LARAR1=0x%08x\n", ecm->lawar1);
#endif
/*
* Confirm that the requested amount of memory was mapped.

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@ -201,6 +201,7 @@ _start_e500:
lis r7,CFG_CCSRBAR@h
ori r7,r7,CFG_CCSRBAR@l
#ifndef CONFIG_FSL_LAW
bl law_entry
mr r6,r0
lwzu r5,0(r6) /* how many windows we actually use */
@ -216,6 +217,7 @@ _start_e500:
addi r2,r2,0x0020
addi r1,r1,0x0020
bdnz 0b
#endif
/* Clear and set up some registers. */
li r0,0

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@ -28,6 +28,7 @@ LIB := $(obj)libmisc.a
COBJS-y += ali512x.o
COBJS-y += ns87308.o
COBJS-y += status_led.o
COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

70
drivers/misc/fsl_law.c Normal file
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@ -0,0 +1,70 @@
/*
* Copyright 2008 Freescale Semiconductor, Inc.
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/fsl_law.h>
#include <asm/io.h>
#define LAWAR_EN 0x80000000
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
volatile u32 *lawbar = base + 8 * idx;
volatile u32 *lawar = base + 8 * idx + 2;
out_be32(lawbar, addr >> 12);
out_be32(lawar, LAWAR_EN | ((u32)id << 20) | (u32)sz);
return ;
}
void disable_law(u8 idx)
{
volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
volatile u32 *lawbar = base + 8 * idx;
volatile u32 *lawar = base + 8 * idx + 2;
out_be32(lawar, 0);
out_be32(lawbar, 0);
return;
}
void init_laws(void)
{
int i;
u8 law_idx = 0;
for (i = 0; i < num_law_entries; i++) {
if (law_table[i].index != -1)
law_idx = law_table[i].index;
set_law(law_idx++, law_table[i].addr,
law_table[i].size, law_table[i].trgt_id);
}
return ;
}

80
include/asm-ppc/fsl_law.h Normal file
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@ -0,0 +1,80 @@
#ifndef _FSL_LAW_H_
#define _FSL_LAW_H_
#include <asm/io.h>
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#define SET_LAW_ENTRY(idx, a, sz, trgt) \
{ .index = idx, .addr = a, .size = sz, .trgt_id = trgt }
enum law_size {
LAW_SIZE_4K = 0xb,
LAW_SIZE_8K,
LAW_SIZE_16K,
LAW_SIZE_32K,
LAW_SIZE_64K,
LAW_SIZE_128K,
LAW_SIZE_256K,
LAW_SIZE_512K,
LAW_SIZE_1M,
LAW_SIZE_2M,
LAW_SIZE_4M,
LAW_SIZE_8M,
LAW_SIZE_16M,
LAW_SIZE_32M,
LAW_SIZE_64M,
LAW_SIZE_128M,
LAW_SIZE_256M,
LAW_SIZE_512M,
LAW_SIZE_1G,
LAW_SIZE_2G,
LAW_SIZE_4G,
LAW_SIZE_8G,
LAW_SIZE_16G,
LAW_SIZE_32G,
};
enum law_trgt_if {
LAW_TRGT_IF_PCI = 0x00,
LAW_TRGT_IF_PCI_2 = 0x01,
#ifndef CONFIG_MPC8641
LAW_TRGT_IF_PCIE_1 = 0x02,
#endif
#ifndef CONFIG_MPC8572
LAW_TRGT_IF_PCIE_3 = 0x03,
#endif
LAW_TRGT_IF_LBC = 0x04,
LAW_TRGT_IF_CCSR = 0x08,
LAW_TRGT_IF_DDR_INTRLV = 0x0b,
LAW_TRGT_IF_RIO = 0x0c,
LAW_TRGT_IF_DDR = 0x0f,
LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */
};
#define LAW_TRGT_IF_DDR_1 LAW_TRGT_IF_DDR
#define LAW_TRGT_IF_PCI_1 LAW_TRGT_IF_PCI
#define LAW_TRGT_IF_PCIX LAW_TRGT_IF_PCI
#define LAW_TRGT_IF_PCIE_2 LAW_TRGT_IF_PCI_2
#ifdef CONFIG_MPC8641
#define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI
#endif
#ifdef CONFIG_MPC8572
#define LAW_TRGT_IF_PCIE_3 LAW_TRGT_IF_PCI
#endif
struct law_entry {
int index;
phys_addr_t addr;
enum law_size size;
enum law_trgt_if trgt_id;
};
extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
extern void disable_law(u8 idx);
extern void init_laws(void);
/* define in board code */
extern struct law_entry law_table[];
extern int num_law_entries;
#endif