arm: dts: add imx8mm-cl-iot-gate dts file
Add board dts for imx8mm-cl-iot-gate Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Peter Robinson <pbrobinson@gmail.com>
This commit is contained in:
Ying-Chun Liu (PaulLiu)
Stefano Babic
parent
cd4359194b
commit
8350211af4
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@ -1085,6 +1085,8 @@ dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
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dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
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dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb
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targets += $(dtb-y)
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# Add any required device tree compiler flags here
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@ -0,0 +1,255 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 NXP
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*/
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/ {
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binman: binman {
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multiple-images;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog1>;
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u-boot,dm-spl;
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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};
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&{/soc@0} {
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u-boot,dm-pre-reloc;
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u-boot,dm-spl;
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};
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&clk {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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/delete-property/ assigned-clock-rates;
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};
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&osc_24m {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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};
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&aips1 {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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};
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&aips2 {
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u-boot,dm-spl;
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};
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&aips3 {
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u-boot,dm-spl;
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};
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&iomuxc {
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u-boot,dm-spl;
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};
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&pinctrl_uart3 {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc2_gpio {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc2 {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc3 {
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u-boot,dm-spl;
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};
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&gpio1 {
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u-boot,dm-spl;
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};
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&gpio2 {
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u-boot,dm-spl;
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};
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&gpio3 {
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u-boot,dm-spl;
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};
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&gpio4 {
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u-boot,dm-spl;
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};
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&gpio5 {
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u-boot,dm-spl;
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};
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&uart3 {
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u-boot,dm-spl;
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};
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&usdhc1 {
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u-boot,dm-spl;
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};
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&usdhc2 {
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u-boot,dm-spl;
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};
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&usdhc3 {
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u-boot,dm-spl;
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};
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&i2c1 {
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u-boot,dm-spl;
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};
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&i2c2 {
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u-boot,dm-spl;
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};
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&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
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u-boot,dm-spl;
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};
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&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} {
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u-boot,dm-spl;
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};
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&pinctrl_i2c2 {
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u-boot,dm-spl;
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};
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&pinctrl_pmic {
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u-boot,dm-spl;
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};
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&fec1 {
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phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
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};
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&wdog1 {
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u-boot,dm-spl;
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};
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&binman {
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u-boot-spl-ddr {
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filename = "u-boot-spl-ddr.bin";
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pad-byte = <0xff>;
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align-size = <4>;
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align = <4>;
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u-boot-spl {
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align-end = <4>;
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};
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blob_1: blob-ext@1 {
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filename = "lpddr4_pmu_train_1d_imem.bin";
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size = <0x8000>;
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};
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blob_2: blob-ext@2 {
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filename = "lpddr4_pmu_train_1d_dmem.bin";
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size = <0x4000>;
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};
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blob_3: blob-ext@3 {
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filename = "lpddr4_pmu_train_2d_imem.bin";
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size = <0x8000>;
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};
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blob_4: blob-ext@4 {
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filename = "lpddr4_pmu_train_2d_dmem.bin";
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size = <0x4000>;
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};
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};
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flash {
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mkimage {
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args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000";
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blob {
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filename = "u-boot-spl-ddr.bin";
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};
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};
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};
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itb {
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filename = "u-boot.itb";
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fit {
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description = "Configuration to load ATF before U-Boot";
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#address-cells = <1>;
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fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
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images {
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uboot {
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description = "U-Boot (64-bit)";
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type = "standalone";
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arch = "arm64";
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compression = "none";
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load = <CONFIG_SYS_TEXT_BASE>;
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uboot_blob: blob-ext {
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filename = "u-boot-nodtb.bin";
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};
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};
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atf {
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description = "ARM Trusted Firmware";
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type = "firmware";
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arch = "arm64";
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compression = "none";
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load = <0x920000>;
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entry = <0x920000>;
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atf_blob: blob-ext {
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filename = "bl31.bin";
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};
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};
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fip {
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description = "Trusted Firmware FIP";
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type = "firmware";
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arch = "arm64";
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compression = "none";
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load = <0x40310000>;
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fip_blob: blob-ext{
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filename = "fip.bin";
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};
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};
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fdt {
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description = "NAME";
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type = "flat_dt";
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compression = "none";
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uboot_fdt_blob: blob-ext {
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filename = "u-boot.dtb";
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};
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};
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};
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configurations {
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default = "conf";
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conf {
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description = "NAME";
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firmware = "uboot";
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loadables = "atf", "fip";
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fdt = "fdt";
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};
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};
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};
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};
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};
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@ -0,0 +1,553 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2019 NXP
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*/
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/dts-v1/;
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#include <dt-bindings/usb/pd.h>
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#include "imx8mm.dtsi"
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/ {
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model = "CompuLab IOT-GATE-iMX8";
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compatible = "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm";
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chosen {
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bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200";
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stdout-path = &uart3;
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};
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reg_vusb_5v: regulator-usdhc2 {
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compatible = "regulator-fixed";
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regulator-name = "VUSB_5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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enable-active-high;
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};
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reg_usdhc2_vqmmc: regulator-usdhc2_1v8 {
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compatible = "regulator-fixed";
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regulator-name = "usdhc2_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
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compatible = "regulator-fixed";
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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off-on-delay-us = <12000>;
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};
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};
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&A53_0 {
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cpu-supply = <&buck2_reg>;
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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at803x,led-act-blind-workaround;
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at803x,eee-okay;
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at803x,vddio-1p8v;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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eeprom@54 {
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compatible = "atmel,24c08";
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reg = <0x54>;
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pagesize = <16>;
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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rtc@69 {
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compatible = "abracon,ab1805";
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reg = <0x69>;
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pagesize = <16>;
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status = "okay";
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};
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pmic@4b {
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compatible = "rohm,bd71837";
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reg = <0x4b>;
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pinctrl-0 = <&pinctrl_pmic>;
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gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 GPIO_ACTIVE_LOW>;
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gpo {
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rohm,drv = <0x0C>; /* 0b0000_1100 all gpos with cmos output mode */
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};
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regulators {
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bd71837,pmic-buck2-uses-i2c-dvs;
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bd71837,pmic-buck2-dvs-voltage = <1000000>,
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<900000>,
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<0>; /* VDD_ARM: Run-Idle */
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buck1_reg: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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};
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buck2_reg: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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};
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buck3_reg: BUCK3 {
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regulator-name = "BUCK3";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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};
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buck4_reg: BUCK4 {
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regulator-name = "BUCK4";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5_reg: BUCK5 {
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regulator-name = "BUCK5";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6_reg: BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck7_reg: BUCK7 {
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regulator-name = "BUCK7";
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regulator-min-microvolt = <1605000>;
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regulator-max-microvolt = <1995000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck8_reg: BUCK8 {
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regulator-name = "BUCK8";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2_reg: LDO2 {
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regulator-name = "LDO2";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3_reg: LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4_reg: LDO4 {
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regulator-name = "LDO4";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo5_reg: LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo6_reg: LDO6 {
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regulator-name = "LDO6";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo7_reg: LDO7 {
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regulator-name = "LDO7";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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};
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ptn5110: tcpc@50 {
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compatible = "nxp,ptn5110";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_typec1>;
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reg = <0x50>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 8>;
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status = "okay";
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port {
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typec1_dr_sw: endpoint {
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remote-endpoint = <&usb1_drd_sw>;
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};
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};
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typec1_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "dual";
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data-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
|
||||
PDO_VAR(5000, 20000, 3000)>;
|
||||
op-sink-microwatt = <15000000>;
|
||||
self-powered;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c4 {/* Expansion connector I2C */
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c4>;
|
||||
status = "okay";
|
||||
|
||||
pca9555: gpio@22 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x22>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&snvs_pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 { /* console */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg1 {
|
||||
dr_mode = "host";
|
||||
hnp-disable;
|
||||
srp-disable;
|
||||
adp-disable;
|
||||
usb-role-switch;
|
||||
vbus-supply = <®_vusb_5v>;
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
usb1_drd_sw: endpoint {
|
||||
remote-endpoint = <&typec1_dr_sw>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usbotg2 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
fsl,wp-controller;
|
||||
vmmc-supply = <®_usdhc2_vmmc>;
|
||||
no-1-8-v;
|
||||
mmc-ddr-1_8v;
|
||||
non-removable;
|
||||
vqmmc-supply = <®_usdhc2_vqmmc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
/* USB VBUS enable GPIO */
|
||||
MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_hog_1: hoggrp-1 {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19
|
||||
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x140
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec1: fec1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
|
||||
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
|
||||
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
|
||||
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
|
||||
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
|
||||
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
|
||||
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
|
||||
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
|
||||
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexspi0: flexspi0grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c4
|
||||
MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x84
|
||||
MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x84
|
||||
MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x84
|
||||
MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x84
|
||||
MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x84
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4: i2c4grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicirq {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_typec1: typec1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
|
||||
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
|
||||
MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
|
||||
MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2grpgpio {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196
|
||||
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
|
||||
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue