diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index bff00c3283..be0c6d98bd 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -276,19 +276,3 @@
 	rx_delay = <0x10>;
 	status = "okay";
 };
-
-&gmac {
-        phy-supply = <&vcc_phy>;
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-	assigned-clocks = <&cru SCLK_RMII_SRC>;
-	assigned-clock-parents = <&clkin_gmac>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii_pins>;
-	tx_delay = <0x10>;
-	rx_delay = <0x10>;
-	status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index 3d3f507934..31e3ba8a47 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -211,8 +211,8 @@
 	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 10000 50000>;
-	tx_delay = <0x28>;
-	rx_delay = <0x11>;
+	tx_delay = <0x33>;
+	rx_delay = <0x45>;
 	status = "okay";
 };
 
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index 2a2f804f67..a7999ca5af 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -162,20 +162,17 @@ enum {
 	/* CRU_CLKSEL11_CON */
 	EMMC_PLL_SHIFT		= 12,
 	EMMC_PLL_MASK		= 3 << EMMC_PLL_SHIFT,
-	EMMC_SEL_APLL		= 0,
-	EMMC_SEL_DPLL,
+	EMMC_SEL_CPLL		= 0,
 	EMMC_SEL_GPLL,
 	EMMC_SEL_24M,
 	SDIO_PLL_SHIFT		= 10,
 	SDIO_PLL_MASK		= 3 << SDIO_PLL_SHIFT,
-	SDIO_SEL_APLL		= 0,
-	SDIO_SEL_DPLL,
+	SDIO_SEL_CPLL		= 0,
 	SDIO_SEL_GPLL,
 	SDIO_SEL_24M,
 	MMC0_PLL_SHIFT		= 8,
 	MMC0_PLL_MASK		= 3 << MMC0_PLL_SHIFT,
-	MMC0_SEL_APLL		= 0,
-	MMC0_SEL_DPLL,
+	MMC0_SEL_CPLL		= 0,
 	MMC0_SEL_GPLL,
 	MMC0_SEL_24M,
 	MMC0_DIV_SHIFT		= 0,
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 1e79c19309..c0ac2e9b56 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -72,11 +72,13 @@ int board_init(void)
 
 int dram_init_banksize(void)
 {
-	/* Reserve 0x200000 for OPTEE */
-	gd->bd->bi_dram[0].start = 0x60000000;
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x8400000;
-	gd->bd->bi_dram[1].start = 0x6a400000;
-	gd->bd->bi_dram[1].size = gd->ram_size - gd->bd->bi_dram[1].start;
+	/* Reserve 0x200000 for OPTEE */
+	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+				+ gd->bd->bi_dram[0].size + 0x200000;
+	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+				+ gd->ram_size - gd->bd->bi_dram[1].start;
 
 	return 0;
 }
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index a13b717bbd..d6bf74f7ad 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -7,7 +7,6 @@
 #include <common.h>
 #include <debug_uart.h>
 #include <dm.h>
-#include <fdtdec.h>
 #include <ram.h>
 #include <spl.h>
 #include <asm/gpio.h>
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 112b3e6022..fde0d09a5a 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -12,9 +12,9 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
 obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
-obj-$(CONFIG_$(SPL_TPL_)SPL_NOR_SUPPORT) += spl_nor.o
-obj-$(CONFIG_$(SPL_TPL_)SPL_XIP_SUPPORT) += spl_xip.o
-obj-$(CONFIG_$(SPL_TPL_)SPL_YMODEM_SUPPORT) += spl_ymodem.o
+obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
+obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o
+obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += spl_ymodem.o
 ifndef CONFIG_SPL_UBI
 obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += spl_nand.o
 obj-$(CONFIG_$(SPL_TPL_)ONENAND_SUPPORT) += spl_onenand.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk322x.c b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
index 7aaf4b5801..576b03739f 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
@@ -168,7 +168,7 @@ static void pinctrl_rk322x_sdmmc_config(struct rk322x_grf *grf, int mmc_id)
 		rk_clrsetreg(&grf->gpio1b_iomux,
 			     GPIO1B6_MASK | GPIO1B7_MASK,
 			     GPIO1B6_SDMMC_PWREN << GPIO1B6_SHIFT |
-			     GPIO1B7_SDMMC_CMD << GPIO1B6_SHIFT);
+			     GPIO1B7_SDMMC_CMD << GPIO1B7_SHIFT);
 		rk_clrsetreg(&grf->gpio1c_iomux, 0xfff,
 			     GPIO1C5_SDMMC_D3 << GPIO1C5_SHIFT |
 			     GPIO1C4_SDMMC_D2 << GPIO1C4_SHIFT |
@@ -279,12 +279,12 @@ static int rk322x_pinctrl_probe(struct udevice *dev)
 }
 
 static const struct udevice_id rk322x_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk322x-pinctrl" },
+	{ .compatible = "rockchip,rk3228-pinctrl" },
 	{ }
 };
 
-U_BOOT_DRIVER(pinctrl_rk322x) = {
-	.name		= "pinctrl_rk322x",
+U_BOOT_DRIVER(pinctrl_rk3228) = {
+	.name		= "pinctrl_rk3228",
 	.id		= UCLASS_PINCTRL,
 	.of_match	= rk322x_pinctrl_ids,
 	.priv_auto_alloc_size = sizeof(struct rk322x_pinctrl_priv),