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arm: mvebu: Add SDIO/SDHCI support for Armada A38x

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Armada A38x implements an SDHCI compatible SDIO controller. This patch
enables the Marvell driver to support this SoC. And enables the
SDIO controller if selected by the board configuration.

Tested on Marvell DB-88F6820-GP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This commit is contained in:
Stefan Roese 2015-06-29 14:58:10 +02:00 committed by Luka Perkov
parent 492d3223b0
commit 7f1adcd74f
4 changed files with 24 additions and 0 deletions
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11
arch/arm/mach-mvebu/cpu.c
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@ -10,6 +10,7 @@
#include <asm/pl310.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <sdhci.h>
#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
@ -245,6 +246,16 @@ int cpu_eth_init(bd_t *bis)
}
#endif
#ifdef CONFIG_MV_SDHCI
int board_mmc_init(bd_t *bis)
{
mv_sdh_init(MVEBU_SDIO_BASE, 0, 0,
SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD);
return 0;
}
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
{

2
arch/arm/mach-mvebu/include/mach/cpu.h
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@ -114,6 +114,8 @@ void mvebu_sdram_size_adjust(enum memory_bank bank);
int mvebu_mbus_probe(struct mbus_win windows[], int count);
int mvebu_soc_family(void);
int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
/*
* Highspeed SERDES PHY config init, ported from bin_hdr
* to mainline U-Boot

10
arch/arm/mach-mvebu/include/mach/gpio.h Normal file
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@ -0,0 +1,10 @@
/*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MACH_MVEBU_GPIO_H
#define __MACH_MVEBU_GPIO_H
/* Empty file - sdhci requires this. */
#endif

1
arch/arm/mach-mvebu/include/mach/soc.h
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@ -51,6 +51,7 @@
#define MVEBU_REG_PCIE_BASE (MVEBU_REGISTER(0x40000))
#define MVEBU_EGIGA0_BASE (MVEBU_REGISTER(0x70000))
#define MVEBU_EGIGA1_BASE (MVEBU_REGISTER(0x74000))
#define MVEBU_SDIO_BASE (MVEBU_REGISTER(0xd8000))
#define SDRAM_MAX_CS 4
#define SDRAM_ADDR_MASK 0xFF000000