dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target

Define the D-cache line size for S5PC110 GONI reference target.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anton Staaf <robotboy@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Łukasz Majewski 2011-10-17 01:42:23 +00:00 committed by Albert ARIBAUD
parent 9b3ab1c975
commit 7cb54948ae

View File

@ -220,6 +220,8 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_PMIC
#define CONFIG_PMIC_I2C
#define CONFIG_PMIC_MAX8998