armv8: ls1043ardb: invert irq pin polarity for AQR105 PHY

To use AQR105 PHY's interrupt, we need to invert the IRQ pin polarity
by setting relative bit in SCFG_INTPCR register, because AQR105
interrupt is low active but GIC accepts high active.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Shaohui Xie 2016-04-29 22:07:21 +08:00 committed by York Sun
parent 76394c9c91
commit 7942550a14
2 changed files with 5 additions and 0 deletions

View File

@ -82,6 +82,8 @@ int board_early_init_f(void)
int board_init(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
#ifdef CONFIG_FSL_IFC
init_final_memctl_regs();
#endif
@ -93,6 +95,8 @@ int board_init(void)
#ifdef CONFIG_U_QE
u_qe_init();
#endif
/* invert AQR105 IRQ pins polarity */
out_be32(&scfg->intpcr, AQR105_IRQ_MASK);
return 0;
}

View File

@ -253,6 +253,7 @@
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
#define CONFIG_PHY_AQUANTIA
#define AQR105_IRQ_MASK 0x40000000
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2