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ARM: sunxi: Fix reset command on sun6i/sun8i
The watchdog on sun6i/sun8i has a different layout. Add the new layout and fix up the setup functions so that reset works. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> [ ijc -- removed sun5i workaround from sun6i/sun8i codepath as discussed ]
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@ -75,6 +75,7 @@ int gpio_init(void)
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void reset_cpu(ulong addr)
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void reset_cpu(ulong addr)
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{
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{
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#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
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static const struct sunxi_wdog *wdog =
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static const struct sunxi_wdog *wdog =
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&((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
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&((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
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@ -86,6 +87,15 @@ void reset_cpu(ulong addr)
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/* sun5i sometimes gets stuck without this */
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/* sun5i sometimes gets stuck without this */
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writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
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writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
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}
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}
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#else /* CONFIG_SUN6I || CONFIG_SUN8I || .. */
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static const struct sunxi_wdog *wdog =
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((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
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/* Set the watchdog for its shortest interval (.5s) and wait */
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writel(WDT_CFG_RESET, &wdog->cfg);
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writel(WDT_MODE_EN, &wdog->mode);
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writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
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#endif
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}
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}
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/* do some early init */
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/* do some early init */
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@ -12,6 +12,9 @@
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#define WDT_CTRL_RESTART (0x1 << 0)
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#define WDT_CTRL_RESTART (0x1 << 0)
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#define WDT_CTRL_KEY (0x0a57 << 1)
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#define WDT_CTRL_KEY (0x0a57 << 1)
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#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
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#define WDT_MODE_EN (0x1 << 0)
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#define WDT_MODE_EN (0x1 << 0)
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#define WDT_MODE_RESET_EN (0x1 << 1)
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#define WDT_MODE_RESET_EN (0x1 << 1)
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@ -21,4 +24,21 @@ struct sunxi_wdog {
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u32 res[2];
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u32 res[2];
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};
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};
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#else
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#define WDT_CFG_RESET (0x1)
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#define WDT_MODE_EN (0x1)
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struct sunxi_wdog {
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u32 irq_en; /* 0x00 */
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u32 irq_sta; /* 0x04 */
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u32 res1[2];
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u32 ctl; /* 0x10 */
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u32 cfg; /* 0x14 */
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u32 mode; /* 0x18 */
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u32 res2;
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};
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#endif
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#endif /* _SUNXI_WATCHDOG_H_ */
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#endif /* _SUNXI_WATCHDOG_H_ */
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