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Merge git://git.denx.de/u-boot-mpc85xx

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This commit is contained in:
Tom Rini 2016-10-15 13:03:19 -04:00
commit 78ad715788
50 changed files with 321 additions and 54 deletions
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4
arch/powerpc/cpu/mpc85xx/fdt.c
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@ -626,10 +626,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_prop_u32(blob, "device_type", "soc", 4, do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1); "bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
"bus-frequency", gd->arch.lbc_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,elbc",
"bus-frequency", gd->arch.lbc_clk, 1);
#ifdef CONFIG_QE #ifdef CONFIG_QE
ft_qe_setup(blob); ft_qe_setup(blob);
ft_fixup_qe_snum(blob); ft_fixup_qe_snum(blob);

7
arch/powerpc/cpu/mpc86xx/fdt.c
View File

@ -30,13 +30,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_prop_u32(blob, "device_type", "soc", 4, do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1); "bus-frequency", bd->bi_busfreq, 1);
#if defined(CONFIG_MPC8641)
do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus",
"bus-frequency", gd->arch.lbc_clk, 1);
#endif
do_fixup_by_compat_u32(blob, "fsl,elbc",
"bus-frequency", gd->arch.lbc_clk, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) \ #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) \

0
board/freescale/t102xqds/t1024_rcw.cfg → board/freescale/t102xqds/t1024_nand_rcw.cfg
View File

10
board/freescale/t102xqds/t1024_sd_rcw.cfg Normal file
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@ -0,0 +1,10 @@
# single-source clock:Sys_Clock = DDR_Refclock = Diff_Sysclk = 100 MHz
# Core/DDR/Platform/FMan = 1400MHz/1600MT/s/400MHz/700MHz
# PBL preamble and RCW header for T1024QDS
aa55aa55 010e0100
# Serdes protocol 0x6F
0810000e 00000000 00000000 00000000
37800001 00000012 68104000 21000000
00000000 00000000 00000000 00030810
00000000 036c5a00 00000000 00000006

10
board/freescale/t102xqds/t1024_spi_rcw.cfg Normal file
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@ -0,0 +1,10 @@
# single-source clock:Sys_Clock = DDR_Refclock = Diff_Sysclk = 100 MHz
# Core/DDR/Platform/FMan = 1400MHz/1600MT/s/400MHz/700MHz
# PBL preamble and RCW header for T1024QDS
aa55aa55 010e0100
# Serdes protocol 0x6F
0810000e 00000000 00000000 00000000
37800001 00000012 58104000 21000000
00000000 00000000 00000000 00030810
00000000 036c5a00 00000000 00000006

0
board/freescale/t102xrdb/t1023_rcw.cfg → board/freescale/t102xrdb/t1023_nand_rcw.cfg
View File

8
board/freescale/t102xrdb/t1023_sd_rcw.cfg Normal file
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@ -0,0 +1,8 @@
#PBL preamble and RCW header for T1023RDB
aa55aa55 010e0100
#SerDes Protocol: 0x77
#Default Core=1200MHz, DDR=1600MT/s with single source clock
0810000c 00000000 00000000 00000000
3b800003 00000012 68104000 21000000
00000000 00000000 00000000 00022800
00000130 04020200 00000000 00000006

8
board/freescale/t102xrdb/t1023_spi_rcw.cfg Normal file
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@ -0,0 +1,8 @@
#PBL preamble and RCW header for T1023RDB
aa55aa55 010e0100
#SerDes Protocol: 0x77
#Default Core=1200MHz, DDR=1600MT/s with single source clock
0810000c 00000000 00000000 00000000
3b800003 00000012 58104000 21000000
00000000 00000000 00000000 00022800
00000130 04020200 00000000 00000006

0
board/freescale/t102xrdb/t1024_rcw.cfg → board/freescale/t102xrdb/t1024_nand_rcw.cfg
View File

8
board/freescale/t102xrdb/t1024_sd_rcw.cfg Normal file
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@ -0,0 +1,8 @@
#PBL preamble and RCW header for T1024RDB
aa55aa55 010e0100
#SerDes Protocol: 0x95
#Core/DDR: 1400Mhz/1600MT/s with single source clock
0810000c 00000000 00000000 00000000
4a800003 80000012 6c027000 21000000
00000000 00000000 00000000 00030810
00000000 0b005a08 00000000 00000006

8
board/freescale/t102xrdb/t1024_spi_rcw.cfg Normal file
View File

@ -0,0 +1,8 @@
#PBL preamble and RCW header for T1024RDB
aa55aa55 010e0100
#SerDes Protocol: 0x95
#Core/DDR: 1400Mhz/1600MT/s with single source clock
0810000c 00000000 00000000 00000000
4a800003 80000012 5c027000 21000000
00000000 00000000 00000000 00030810
00000000 0b005a08 00000000 00000006

0
board/freescale/t104xrdb/t1040_rcw.cfg → board/freescale/t104xrdb/t1040_nand_rcw.cfg
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7
board/freescale/t104xrdb/t1040_sd_rcw.cfg Normal file
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@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x66
0c18000e 0e000000 00000000 00000000
66000002 80000002 68106000 01000000
00000000 00000000 00000000 00032810
00000000 0342500f 00000000 00000000

7
board/freescale/t104xrdb/t1040_spi_rcw.cfg Normal file
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@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x66
0c18000e 0e000000 00000000 00000000
66000002 80000002 58106000 01000000
00000000 00000000 00000000 00032810
00000000 0342500f 00000000 00000000

0
board/freescale/t104xrdb/t1040d4_rcw.cfg → board/freescale/t104xrdb/t1040d4_nand_rcw.cfg
View File

7
board/freescale/t104xrdb/t1040d4_sd_rcw.cfg Normal file
View File

@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x66
0c18000e 0e000000 00000000 00000000
66000002 40000002 6c027000 01000000
00000000 00000000 00000000 00030810
00000000 0342580f 00000000 00000000

7
board/freescale/t104xrdb/t1040d4_spi_rcw.cfg Normal file
View File

@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x66
0c18000e 0e000000 00000000 00000000
66000002 40000002 5c027000 01000000
00000000 00000000 00000000 00030810
00000000 0342580f 00000000 00000000

0
board/freescale/t104xrdb/t1042_rcw.cfg → board/freescale/t104xrdb/t1042_nand_rcw.cfg
View File

0
board/freescale/t104xrdb/t1042_pi_rcw.cfg → board/freescale/t104xrdb/t1042_pi_nand_rcw.cfg
View File

7
board/freescale/t104xrdb/t1042_pi_sd_rcw.cfg Normal file
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@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x06
0c18000e 0e000000 00000000 00000000
06000002 00400002 68106000 01000000
00000000 00000000 00000000 00030810
00000000 01fe0a06 00000000 00000000

7
board/freescale/t104xrdb/t1042_pi_spi_rcw.cfg Normal file
View File

@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x06
0c18000e 0e000000 00000000 00000000
06000002 00400002 58106000 01000000
00000000 00000000 00000000 00030810
00000000 01fe0a06 00000000 00000000

7
board/freescale/t104xrdb/t1042_sd_rcw.cfg Normal file
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@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x86
0c18000e 0e000000 00000000 00000000
86000002 80000002 6c027000 01000000
00000000 00000000 00000000 00032810
00000000 0342500f 00000000 00000000

7
board/freescale/t104xrdb/t1042_spi_rcw.cfg Normal file
View File

@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x86
0c18000e 0e000000 00000000 00000000
86000002 80000002 5c027000 01000000
00000000 00000000 00000000 00032810
00000000 0342500f 00000000 00000000

0
board/freescale/t104xrdb/t1042d4_rcw.cfg → board/freescale/t104xrdb/t1042d4_nand_rcw.cfg
View File

7
board/freescale/t104xrdb/t1042d4_sd_rcw.cfg Normal file
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@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x86
0c18000e 0e000000 00000000 00000000
86000002 40000002 6c027000 01000000
00000000 00000000 00000000 00030810
00000000 0342500f 00000000 00000000

7
board/freescale/t104xrdb/t1042d4_spi_rcw.cfg Normal file
View File

@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x86
0c18000e 0e000000 00000000 00000000
86000002 40000002 5c027000 01000000
00000000 00000000 00000000 00030810
00000000 0342500f 00000000 00000000

0
board/freescale/t208xqds/t2080_rcw.cfg → board/freescale/t208xqds/t2080_nand_rcw.cfg
View File

16
board/freescale/t208xqds/t2080_sd_rcw.cfg Normal file
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@ -0,0 +1,16 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#For T2080 v1.0
#SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s
#12100017 15000000 00000000 00000000
#66150002 00008400 e8104000 c1000000
#00000000 00000000 00000000 000307fc
#00000000 00000000 00000000 00000004
#For T2080 v1.1
#SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
0c070012 0e000000 00000000 00000000
66150002 00000000 68104000 c1000000
00000000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004

16
board/freescale/t208xqds/t2080_spi_rcw.cfg Normal file
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@ -0,0 +1,16 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#For T2080 v1.0
#SerDes=0x66_0x16, Core=1533MHz, DDR=2133MT/s
#12100017 15000000 00000000 00000000
#66150002 00008400 e8104000 c1000000
#00000000 00000000 00000000 000307fc
#00000000 00000000 00000000 00000004
#For T2080 v1.1
#SerDes=0x66_0x15, Core=1800MHz, DDR=1867MT/s
0c070012 0e000000 00000000 00000000
66150002 00000000 58104000 c1000000
00000000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004

0
board/freescale/t208xqds/t2081_rcw.cfg → board/freescale/t208xqds/t2081_nand_rcw.cfg
View File

8
board/freescale/t208xqds/t2081_sd_rcw.cfg Normal file
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@ -0,0 +1,8 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#Default SerDes Protocol: 0x6C
#Core/DDR: 1533Mhz/2133MT/s
12100017 15000000 00000000 00000000
6c000002 00008000 68104000 c1000000
00000000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004

8
board/freescale/t208xqds/t2081_spi_rcw.cfg Normal file
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@ -0,0 +1,8 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#Default SerDes Protocol: 0x6C
#Core/DDR: 1533Mhz/2133MT/s
12100017 15000000 00000000 00000000
6c000002 00008000 58104000 c1000000
00000000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004

3
board/freescale/t208xqds/t208x_pbi.cfg
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@ -37,5 +37,4 @@
09000014 ff000000 09000014 ff000000
09000018 81000000 09000018 81000000
#Flush PBL data #Flush PBL data
09138000 00000000 091380c0 00100000
091380c0 00000000

0
board/freescale/t208xrdb/t2080_rcw.cfg → board/freescale/t208xrdb/t2080_nand_rcw.cfg
View File

3
board/freescale/t208xrdb/t2080_pbi.cfg
View File

@ -37,5 +37,4 @@
09000014 ff000000 09000014 ff000000
09000018 81000000 09000018 81000000
#Flush PBL data #Flush PBL data
09138000 00000000 091380c0 00100000
091380c0 00000000

19
board/freescale/t208xrdb/t2080_sd_rcw.cfg Normal file
View File

@ -0,0 +1,19 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#For T2080 v1.0
#SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s
#120c0017 15000000 00000000 00000000
#66150002 00008400 ec104000 c1000000
#00000000 00000000 00000000 000307fc
#00000000 00000000 00000000 00000004
#For T2080 v1.1
#SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s
#1206001b 15000000 00000000 00000000
#SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
1207001b 15000000 00000000 00000000
66150002 00000000 68104000 c1000000
00800000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004

19
board/freescale/t208xrdb/t2080_spi_rcw.cfg Normal file
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@ -0,0 +1,19 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#For T2080 v1.0
#SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s
#120c0017 15000000 00000000 00000000
#66150002 00008400 ec104000 c1000000
#00000000 00000000 00000000 000307fc
#00000000 00000000 00000000 00000004
#For T2080 v1.1
#SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s
#1206001b 15000000 00000000 00000000
#SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
1207001b 15000000 00000000 00000000
66150002 00000000 58104000 c1000000
00800000 00000000 00000000 000307fc
00000000 00000000 00000000 00000004

2
board/freescale/t4qds/t4_rcw.cfg → board/freescale/t4qds/t4_nand_rcw.cfg
View File

@ -2,6 +2,6 @@
aa55aa55 010e0100 aa55aa55 010e0100
#serdes protocol 1_27_5_11 #serdes protocol 1_27_5_11
1607001b 18101b16 00000000 00000000 1607001b 18101b16 00000000 00000000
04362858 30548c00 ec020000 f5000000 04362858 30548c00 e8020000 f5000000
00000000 ee0000ee 00000000 000307fc 00000000 ee0000ee 00000000 000307fc
00000000 00000000 00000000 00000028 00000000 00000000 00000000 00000028

3
board/freescale/t4qds/t4_pbi.cfg
View File

@ -18,5 +18,4 @@
09000014 ff000000 09000014 ff000000
09000018 81000000 09000018 81000000
#Flush PBL data #Flush PBL data
09138000 00000000 091380c0 00100000
091380c0 00000000

7
board/freescale/t4qds/t4_sd_rcw.cfg Normal file
View File

@ -0,0 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
#serdes protocol 1_27_5_11
1607001b 18101b16 00000000 00000000
04362858 30548c00 68020000 f5000000
00000000 ee0000ee 00000000 000307fc
00000000 00000000 00000000 00000028

3
board/freescale/t4rdb/t4_pbi.cfg
View File

@ -24,5 +24,4 @@
09000014 ff000000 09000014 ff000000
09000018 81000000 09000018 81000000
#Flush PBL data #Flush PBL data
09138000 00000000 091380c0 00100000
091380c0 00000000

2
board/freescale/t4rdb/t4_rcw.cfg → board/freescale/t4rdb/t4_sd_rcw.cfg
View File

@ -2,6 +2,6 @@
aa55aa55 010e0100 aa55aa55 010e0100
#serdes protocol 27_55_1_9 #serdes protocol 27_55_1_9
16070019 18101916 00000000 00000000 16070019 18101916 00000000 00000000
6c6e0848 00448c00 ec020000 f5000000 6c6e0848 00448c00 6c020000 f5000000
00000000 ee0000ee 00000000 000307fc 00000000 ee0000ee 00000000 000307fc
00000000 00000000 00000000 00000028 00000000 00000000 00000000 00000028

4
include/configs/T102xQDS.h
View File

@ -41,7 +41,6 @@
#ifdef CONFIG_RAMBOOT_PBL #ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_rcw.cfg
#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_FSL_LAW /* Use common FSL init code */
@ -64,6 +63,7 @@
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_nand_rcw.cfg
#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_NAND_BOOT
#endif #endif
@ -78,6 +78,7 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_spi_rcw.cfg
#define CONFIG_SPL_SPI_BOOT #define CONFIG_SPL_SPI_BOOT
#endif #endif
@ -92,6 +93,7 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_sd_rcw.cfg
#define CONFIG_SPL_MMC_BOOT #define CONFIG_SPL_MMC_BOOT
#endif #endif

20
include/configs/T102xRDB.h
View File

@ -44,11 +44,6 @@
#ifdef CONFIG_RAMBOOT_PBL #ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg
#if defined(CONFIG_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_rcw.cfg
#elif defined(CONFIG_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_rcw.cfg
#endif
#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_FSL_LAW /* Use common FSL init code */
@ -71,6 +66,11 @@
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#if defined(CONFIG_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg
#elif defined(CONFIG_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg
#endif
#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_NAND_BOOT
#endif #endif
@ -85,6 +85,11 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#if defined(CONFIG_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_spi_rcw.cfg
#elif defined(CONFIG_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg
#endif
#define CONFIG_SPL_SPI_BOOT #define CONFIG_SPL_SPI_BOOT
#endif #endif
@ -99,6 +104,11 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#if defined(CONFIG_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_sd_rcw.cfg
#elif defined(CONFIG_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg
#endif
#define CONFIG_SPL_MMC_BOOT #define CONFIG_SPL_MMC_BOOT
#endif #endif

78
include/configs/T104xRDB.h
View File

@ -24,24 +24,6 @@
$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi_sb.cfg $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi_sb.cfg
#endif #endif
#ifdef CONFIG_T1040RDB
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB_PI
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg
#endif
#ifdef CONFIG_T1040D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040d4_rcw.cfg
#endif
#ifdef CONFIG_T1042D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#endif
#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_FSL_LAW /* Use common FSL init code */
@ -74,6 +56,26 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#ifdef CONFIG_T1040RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040_nand_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB_PI
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_nand_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042_nand_rcw.cfg
#endif
#ifdef CONFIG_T1040D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040d4_nand_rcw.cfg
#endif
#ifdef CONFIG_T1042D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_nand_rcw.cfg
#endif
#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_NAND_BOOT
#endif #endif
@ -88,6 +90,26 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#ifdef CONFIG_T1040RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040_spi_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB_PI
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_spi_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042_spi_rcw.cfg
#endif
#ifdef CONFIG_T1040D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040d4_spi_rcw.cfg
#endif
#ifdef CONFIG_T1042D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg
#endif
#define CONFIG_SPL_SPI_BOOT #define CONFIG_SPL_SPI_BOOT
#endif #endif
@ -102,6 +124,26 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#ifdef CONFIG_T1040RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040_sd_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB_PI
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042_pi_sd_rcw.cfg
#endif
#ifdef CONFIG_T1042RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042_sd_rcw.cfg
#endif
#ifdef CONFIG_T1040D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040d4_sd_rcw.cfg
#endif
#ifdef CONFIG_T1042D4RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#endif
#define CONFIG_SPL_MMC_BOOT #define CONFIG_SPL_MMC_BOOT
#endif #endif

20
include/configs/T208xQDS.h
View File

@ -46,11 +46,6 @@
#ifdef CONFIG_RAMBOOT_PBL #ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg
#if defined(CONFIG_PPC_T2080)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_rcw.cfg
#elif defined(CONFIG_PPC_T2081)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg
#endif
#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
@ -74,6 +69,11 @@
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#if defined(CONFIG_PPC_T2080)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_nand_rcw.cfg
#elif defined(CONFIG_PPC_T2081)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_nand_rcw.cfg
#endif
#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_NAND_BOOT
#endif #endif
@ -88,6 +88,11 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#if defined(CONFIG_PPC_T2080)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_spi_rcw.cfg
#elif defined(CONFIG_PPC_T2081)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_spi_rcw.cfg
#endif
#define CONFIG_SPL_SPI_BOOT #define CONFIG_SPL_SPI_BOOT
#endif #endif
@ -102,6 +107,11 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#if defined(CONFIG_PPC_T2080)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_sd_rcw.cfg
#elif defined(CONFIG_PPC_T2081)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_sd_rcw.cfg
#endif
#define CONFIG_SPL_MMC_BOOT #define CONFIG_SPL_MMC_BOOT
#endif #endif

4
include/configs/T208xRDB.h
View File

@ -39,7 +39,6 @@
#ifdef CONFIG_RAMBOOT_PBL #ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_rcw.cfg
#define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
@ -63,6 +62,7 @@
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_nand_rcw.cfg
#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_NAND_BOOT
#endif #endif
@ -77,6 +77,7 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_spi_rcw.cfg
#define CONFIG_SPL_SPI_BOOT #define CONFIG_SPL_SPI_BOOT
#endif #endif
@ -91,6 +92,7 @@
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_sd_rcw.cfg
#define CONFIG_SPL_MMC_BOOT #define CONFIG_SPL_MMC_BOOT
#endif #endif

3
include/configs/T4240QDS.h
View File

@ -20,7 +20,6 @@
#ifdef CONFIG_RAMBOOT_PBL #ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t4qds/t4_pbi.cfg #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t4qds/t4_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_rcw.cfg
#if !defined(CONFIG_NAND) && !defined(CONFIG_SDCARD) #if !defined(CONFIG_NAND) && !defined(CONFIG_SDCARD)
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
@ -41,6 +40,7 @@
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_nand_rcw.cfg
#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_NAND_BOOT
#endif #endif
@ -55,6 +55,7 @@
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_sd_rcw.cfg
#define CONFIG_SPL_MMC_BOOT #define CONFIG_SPL_MMC_BOOT
#endif #endif

2
include/configs/T4240RDB.h
View File

@ -19,7 +19,6 @@
#ifdef CONFIG_RAMBOOT_PBL #ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_rcw.cfg
#ifndef CONFIG_SDCARD #ifndef CONFIG_SDCARD
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
@ -45,6 +44,7 @@
#define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif #endif
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg
#define CONFIG_SPL_MMC_BOOT #define CONFIG_SPL_MMC_BOOT
#endif #endif

2
tools/pblimage.c
View File

@ -297,7 +297,7 @@ int pblimage_check_params(struct image_tool_params *params)
pbi_crc_cmd1 = 0x13; pbi_crc_cmd1 = 0x13;
pbi_crc_cmd2 = 0x80; pbi_crc_cmd2 = 0x80;
pbl_cmd_initaddr = 0x82000000; pbl_cmd_initaddr = 0x82000000;
pbl_end_cmd[0] = 0x09138000; pbl_end_cmd[0] = 0x091380c0;
pbl_end_cmd[1] = 0x00000000; pbl_end_cmd[1] = 0x00000000;
pbl_end_cmd[2] = 0x091380c0; pbl_end_cmd[2] = 0x091380c0;
pbl_end_cmd[3] = 0x00000000; pbl_end_cmd[3] = 0x00000000;