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https://github.com/brain-hackers/u-boot-brain
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cros: add I2C support for cros_ec
This patch adds I2C support for carrying out the cros_ec protocol. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
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@ -29,6 +29,7 @@ COBJS-$(CONFIG_ALI152X) += ali512x.o
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COBJS-$(CONFIG_DS4510) += ds4510.o
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COBJS-$(CONFIG_DS4510) += ds4510.o
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COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
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COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
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COBJS-$(CONFIG_CROS_EC) += cros_ec.o
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COBJS-$(CONFIG_CROS_EC) += cros_ec.o
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COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
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COBJS-$(CONFIG_FSL_IIM) += fsl_iim.o
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COBJS-$(CONFIG_FSL_IIM) += fsl_iim.o
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COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
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COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
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COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
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COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
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199
drivers/misc/cros_ec_i2c.c
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199
drivers/misc/cros_ec_i2c.c
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@ -0,0 +1,199 @@
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/*
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* Chromium OS cros_ec driver - I2C interface
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*
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* Copyright (c) 2012 The Chromium OS Authors.
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* The Matrix Keyboard Protocol driver handles talking to the keyboard
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* controller chip. Mostly this is for keyboard functions, but some other
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* things have slipped in, so we provide generic services to talk to the
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* KBC.
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*/
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#include <common.h>
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#include <i2c.h>
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#include <cros_ec.h>
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#ifdef DEBUG_TRACE
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#define debug_trace(fmt, b...) debug(fmt, #b)
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#else
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#define debug_trace(fmt, b...)
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#endif
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int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
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const uint8_t *dout, int dout_len,
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uint8_t **dinp, int din_len)
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{
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int old_bus = 0;
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/* version8, cmd8, arglen8, out8[dout_len], csum8 */
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int out_bytes = dout_len + 4;
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/* response8, arglen8, in8[din_len], checksum8 */
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int in_bytes = din_len + 3;
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uint8_t *ptr;
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/* Receive input data, so that args will be dword aligned */
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uint8_t *in_ptr;
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int ret;
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old_bus = i2c_get_bus_num();
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/*
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* Sanity-check I/O sizes given transaction overhead in internal
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* buffers.
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*/
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if (out_bytes > sizeof(dev->dout)) {
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debug("%s: Cannot send %d bytes\n", __func__, dout_len);
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return -1;
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}
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if (in_bytes > sizeof(dev->din)) {
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debug("%s: Cannot receive %d bytes\n", __func__, din_len);
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return -1;
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}
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assert(dout_len >= 0);
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assert(dinp);
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/*
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* Copy command and data into output buffer so we can do a single I2C
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* burst transaction.
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*/
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ptr = dev->dout;
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/*
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* in_ptr starts of pointing to a dword-aligned input data buffer.
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* We decrement it back by the number of header bytes we expect to
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* receive, so that the first parameter of the resulting input data
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* will be dword aligned.
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*/
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in_ptr = dev->din + sizeof(int64_t);
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if (!dev->cmd_version_is_supported) {
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/* Send an old-style command */
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*ptr++ = cmd;
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out_bytes = dout_len + 1;
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in_bytes = din_len + 2;
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in_ptr--; /* Expect just a status byte */
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} else {
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*ptr++ = EC_CMD_VERSION0 + cmd_version;
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*ptr++ = cmd;
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*ptr++ = dout_len;
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in_ptr -= 2; /* Expect status, length bytes */
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}
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memcpy(ptr, dout, dout_len);
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ptr += dout_len;
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if (dev->cmd_version_is_supported)
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*ptr++ = (uint8_t)
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cros_ec_calc_checksum(dev->dout, dout_len + 3);
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/* Set to the proper i2c bus */
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if (i2c_set_bus_num(dev->bus_num)) {
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debug("%s: Cannot change to I2C bus %d\n", __func__,
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dev->bus_num);
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return -1;
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}
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/* Send output data */
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cros_ec_dump_data("out", -1, dev->dout, out_bytes);
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ret = i2c_write(dev->addr, 0, 0, dev->dout, out_bytes);
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if (ret) {
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debug("%s: Cannot complete I2C write to 0x%x\n",
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__func__, dev->addr);
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ret = -1;
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}
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if (!ret) {
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ret = i2c_read(dev->addr, 0, 0, in_ptr, in_bytes);
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if (ret) {
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debug("%s: Cannot complete I2C read from 0x%x\n",
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__func__, dev->addr);
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ret = -1;
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}
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}
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/* Return to original bus number */
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i2c_set_bus_num(old_bus);
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if (ret)
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return ret;
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if (*in_ptr != EC_RES_SUCCESS) {
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debug("%s: Received bad result code %d\n", __func__, *in_ptr);
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return -(int)*in_ptr;
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}
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if (dev->cmd_version_is_supported) {
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int len, csum;
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len = in_ptr[1];
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if (len + 3 > sizeof(dev->din)) {
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debug("%s: Received length %#02x too large\n",
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__func__, len);
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return -1;
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}
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csum = cros_ec_calc_checksum(in_ptr, 2 + len);
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if (csum != in_ptr[2 + len]) {
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debug("%s: Invalid checksum rx %#02x, calced %#02x\n",
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__func__, in_ptr[2 + din_len], csum);
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return -1;
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}
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din_len = min(din_len, len);
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cros_ec_dump_data("in", -1, in_ptr, din_len + 3);
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} else {
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cros_ec_dump_data("in (old)", -1, in_ptr, in_bytes);
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}
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/* Return pointer to dword-aligned input data, if any */
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*dinp = dev->din + sizeof(int64_t);
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return din_len;
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}
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int cros_ec_i2c_decode_fdt(struct cros_ec_dev *dev, const void *blob)
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{
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/* Decode interface-specific FDT params */
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dev->max_frequency = fdtdec_get_int(blob, dev->node,
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"i2c-max-frequency", 100000);
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dev->bus_num = i2c_get_bus_num_fdt(dev->parent_node);
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if (dev->bus_num == -1) {
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debug("%s: Failed to read bus number\n", __func__);
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return -1;
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}
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dev->addr = fdtdec_get_int(blob, dev->node, "reg", -1);
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if (dev->addr == -1) {
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debug("%s: Failed to read device address\n", __func__);
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return -1;
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}
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return 0;
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}
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/**
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* Initialize I2C protocol.
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*
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* @param dev CROS_EC device
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* @param blob Device tree blob
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* @return 0 if ok, -1 on error
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*/
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int cros_ec_i2c_init(struct cros_ec_dev *dev, const void *blob)
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{
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i2c_init(dev->max_frequency, dev->addr);
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dev->cmd_version_is_supported = 0;
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return 0;
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}
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