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ARM: k2l: Fix device speeds
ARM supported speeds and init value of core_pll for SDP1200 are programmed wrong as part for the device speed cleanups. Fixing it here. Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection") Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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@ -40,7 +40,7 @@
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/* k2l DEV supports 800, 1000, 1200 MHz */
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/* k2l DEV supports 800, 1000, 1200 MHz */
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#define DEV_SUPPORTED_SPEEDS 0x383
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#define DEV_SUPPORTED_SPEEDS 0x383
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/* k2l ARM supportd 800, 1000, 1200, MHz */
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/* k2l ARM supportd 800, 1000, 1200, 1350, 1400 MHz */
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#define ARM_SUPPORTED_SPEEDS 0x383
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#define ARM_SUPPORTED_SPEEDS 0x3ef
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#endif
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#endif
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@ -25,7 +25,7 @@ unsigned int external_clk[ext_clk_count] = {
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static struct pll_init_data core_pll_config[NUM_SPDS] = {
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static struct pll_init_data core_pll_config[NUM_SPDS] = {
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[SPD800] = CORE_PLL_799,
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[SPD800] = CORE_PLL_799,
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[SPD1000] = CORE_PLL_1000,
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[SPD1000] = CORE_PLL_1000,
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[SPD800] = CORE_PLL_1198,
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[SPD1200] = CORE_PLL_1198,
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};
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};
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s16 divn_val[16] = {
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s16 divn_val[16] = {
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