mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 19:56:18 +09:00
SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250. Supports both FDT and non-FDT. This patch creates a new file 'exynos5-dt.c' meant for FDT support. exynos5-dt.c: This file shall contain all code which supports FDT. Any addition of FDT support for any module needs to be added in this file. smdk5250.c: This file shall contain the code which supports non-FDT. version. Any addition of non-FDT support for any module needs to be added in this file. May be, the file smdk5250.c can be removed in near future when non-FDT is not required. The Makefile is updated to compile only one of the files exynos5-dt.c / smdk5250.c based on FDT configuration. NOTE: Please note that all additions corresponding to FDT need to be added into the file exynos5-dt.c. At same time if non-FDT support is required then add the corresponding updations into smdk5250.c. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
parent
2b81c26b7c
commit
752f4c4a9c
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@ -31,8 +31,12 @@ COBJS += dmc_common.o dmc_init_ddr3.o
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COBJS += smdk5250_spl.o
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COBJS += smdk5250_spl.o
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ifndef CONFIG_SPL_BUILD
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ifndef CONFIG_SPL_BUILD
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ifdef CONFIG_OF_CONTROL
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COBJS += exynos5-dt.o
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else
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COBJS += smdk5250.o
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COBJS += smdk5250.o
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endif
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endif
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endif
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_BUILD
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COBJS += spl_boot.o
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COBJS += spl_boot.o
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423
board/samsung/smdk5250/exynos5-dt.c
Normal file
423
board/samsung/smdk5250/exynos5-dt.c
Normal file
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@ -0,0 +1,423 @@
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/*
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* Copyright (C) 2012 Samsung Electronics
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <asm/io.h>
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#include <errno.h>
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#include <i2c.h>
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#include <netdev.h>
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#include <spi.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/dwmmc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/power.h>
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#include <asm/arch/sromc.h>
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#include <power/pmic.h>
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#include <power/max77686_pmic.h>
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#include <tmu.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if defined CONFIG_EXYNOS_TMU
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/*
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* Boot Time Thermal Analysis for SoC temperature threshold breach
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*/
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static void boot_temp_check(void)
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{
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int temp;
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switch (tmu_monitor(&temp)) {
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/* Status TRIPPED ans WARNING means corresponding threshold breach */
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case TMU_STATUS_TRIPPED:
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puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
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set_ps_hold_ctrl();
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hang();
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break;
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case TMU_STATUS_WARNING:
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puts("EXYNOS_TMU: WARNING! Temperature very high\n");
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break;
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/*
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* TMU_STATUS_INIT means something is wrong with temperature sensing
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* and TMU status was changed back from NORMAL to INIT.
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*/
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case TMU_STATUS_INIT:
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default:
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debug("EXYNOS_TMU: Unknown TMU state\n");
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}
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}
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#endif
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#ifdef CONFIG_USB_EHCI_EXYNOS
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int board_usb_vbus_init(void)
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{
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struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
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samsung_get_base_gpio_part1();
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/* Enable VBUS power switch */
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s5p_gpio_direction_output(&gpio1->x2, 6, 1);
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/* VBUS turn ON time */
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mdelay(3);
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return 0;
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}
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#endif
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#ifdef CONFIG_SOUND_MAX98095
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static void board_enable_audio_codec(void)
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{
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struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
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samsung_get_base_gpio_part1();
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/* Enable MAX98095 Codec */
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s5p_gpio_direction_output(&gpio1->x1, 7, 1);
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s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE);
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}
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#endif
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int board_init(void)
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{
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gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
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#if defined CONFIG_EXYNOS_TMU
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if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
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debug("%s: Failed to init TMU\n", __func__);
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return -1;
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}
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boot_temp_check();
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#endif
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#ifdef CONFIG_EXYNOS_SPI
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spi_init();
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#endif
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#ifdef CONFIG_USB_EHCI_EXYNOS
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board_usb_vbus_init();
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#endif
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#ifdef CONFIG_SOUND_MAX98095
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board_enable_audio_codec();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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int i;
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u32 addr;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
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gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
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}
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return 0;
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}
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#if defined(CONFIG_POWER)
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static int pmic_reg_update(struct pmic *p, int reg, uint regval)
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{
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u32 val;
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int ret = 0;
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ret = pmic_reg_read(p, reg, &val);
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if (ret) {
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debug("%s: PMIC %d register read failed\n", __func__, reg);
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return -1;
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}
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val |= regval;
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ret = pmic_reg_write(p, reg, val);
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if (ret) {
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debug("%s: PMIC %d register write failed\n", __func__, reg);
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return -1;
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}
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return 0;
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}
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int power_init_board(void)
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{
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struct pmic *p;
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set_ps_hold_ctrl();
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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if (pmic_init(I2C_PMIC))
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return -1;
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p = pmic_get("MAX77686_PMIC");
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if (!p)
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return -ENODEV;
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if (pmic_probe(p))
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return -1;
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if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
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return -1;
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if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
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MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
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return -1;
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/* VDD_MIF */
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if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
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MAX77686_BUCK1OUT_1V)) {
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debug("%s: PMIC %d register write failed\n", __func__,
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MAX77686_REG_PMIC_BUCK1OUT);
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return -1;
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}
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if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
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MAX77686_BUCK1CTRL_EN))
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return -1;
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/* VDD_ARM */
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if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
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MAX77686_BUCK2DVS1_1_3V)) {
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debug("%s: PMIC %d register write failed\n", __func__,
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MAX77686_REG_PMIC_BUCK2DVS1);
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return -1;
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}
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if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
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MAX77686_BUCK2CTRL_ON))
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return -1;
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/* VDD_INT */
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if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
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MAX77686_BUCK3DVS1_1_0125V)) {
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debug("%s: PMIC %d register write failed\n", __func__,
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MAX77686_REG_PMIC_BUCK3DVS1);
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return -1;
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}
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if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
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MAX77686_BUCK3CTRL_ON))
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return -1;
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/* VDD_G3D */
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if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
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MAX77686_BUCK4DVS1_1_2V)) {
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debug("%s: PMIC %d register write failed\n", __func__,
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MAX77686_REG_PMIC_BUCK4DVS1);
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return -1;
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}
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if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
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MAX77686_BUCK3CTRL_ON))
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return -1;
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/* VDD_LDO2 */
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if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
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MAX77686_LD02CTRL1_1_5V | EN_LDO))
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return -1;
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/* VDD_LDO3 */
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if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
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MAX77686_LD03CTRL1_1_8V | EN_LDO))
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return -1;
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/* VDD_LDO5 */
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if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
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MAX77686_LD05CTRL1_1_8V | EN_LDO))
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return -1;
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/* VDD_LDO10 */
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if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
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MAX77686_LD10CTRL1_1_8V | EN_LDO))
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return -1;
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return 0;
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}
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#endif
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void dram_init_banksize(void)
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{
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int i;
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u32 addr, size;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
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size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
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gd->bd->bi_dram[i].start = addr;
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gd->bd->bi_dram[i].size = size;
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}
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}
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static int decode_sromc(const void *blob, struct fdt_sromc *config)
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{
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int err;
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int node;
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node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
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if (node < 0) {
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debug("Could not find SROMC node\n");
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return node;
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}
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config->bank = fdtdec_get_int(blob, node, "bank", 0);
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config->width = fdtdec_get_int(blob, node, "width", 2);
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err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
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FDT_SROM_TIMING_COUNT);
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if (err < 0) {
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debug("Could not decode SROMC configuration Error: %s\n",
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fdt_strerror(err));
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return -FDT_ERR_NOTFOUND;
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}
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_SMC911X
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u32 smc_bw_conf, smc_bc_conf;
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struct fdt_sromc config;
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fdt_addr_t base_addr;
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int node;
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node = decode_sromc(gd->fdt_blob, &config);
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if (node < 0) {
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debug("%s: Could not find sromc configuration\n", __func__);
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return 0;
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}
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node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
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if (node < 0) {
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debug("%s: Could not find lan9215 configuration\n", __func__);
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return 0;
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}
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/* We now have a node, so any problems from now on are errors */
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base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
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if (base_addr == FDT_ADDR_T_NONE) {
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debug("%s: Could not find lan9215 address\n", __func__);
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return -1;
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}
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/* Ethernet needs data bus width of 16 bits */
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if (config.width != 2) {
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debug("%s: Unsupported bus width %d\n", __func__,
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config.width);
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return -1;
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}
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smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
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| SROMC_BYTE_ENABLE(config.bank);
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smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
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SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
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SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
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SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
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SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
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SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
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SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
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/* Select and configure the SROMC bank */
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exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
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s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
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return smc911x_initialize(0, base_addr);
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#endif
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return 0;
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}
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
|
||||||
|
const char *board_name;
|
||||||
|
|
||||||
|
board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
|
||||||
|
if (board_name == NULL)
|
||||||
|
printf("\nUnknown Board\n");
|
||||||
|
else
|
||||||
|
printf("\nBoard: %s\n", board_name);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_GENERIC_MMC
|
||||||
|
int board_mmc_init(bd_t *bis)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
/* dwmmc initializattion for available channels */
|
||||||
|
ret = exynos_dwmmc_init(gd->fdt_blob);
|
||||||
|
if (ret)
|
||||||
|
debug("dwmmc init failed\n");
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static int board_uart_init(void)
|
||||||
|
{
|
||||||
|
int err, uart_id, ret = 0;
|
||||||
|
|
||||||
|
for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
|
||||||
|
err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
|
||||||
|
if (err) {
|
||||||
|
debug("UART%d not configured\n",
|
||||||
|
(uart_id - PERIPH_ID_UART0));
|
||||||
|
ret |= err;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_BOARD_EARLY_INIT_F
|
||||||
|
int board_early_init_f(void)
|
||||||
|
{
|
||||||
|
int err;
|
||||||
|
err = board_uart_init();
|
||||||
|
if (err) {
|
||||||
|
debug("UART init failed\n");
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
#ifdef CONFIG_SYS_I2C_INIT_BOARD
|
||||||
|
board_i2c_init(gd->fdt_blob);
|
||||||
|
#endif
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_LCD
|
||||||
|
void exynos_cfg_lcd_gpio(void)
|
||||||
|
{
|
||||||
|
struct exynos5_gpio_part1 *gpio1 =
|
||||||
|
(struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1();
|
||||||
|
|
||||||
|
/* For Backlight */
|
||||||
|
s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
|
||||||
|
s5p_gpio_set_value(&gpio1->b2, 0, 1);
|
||||||
|
|
||||||
|
/* LCD power on */
|
||||||
|
s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
|
||||||
|
s5p_gpio_set_value(&gpio1->x1, 5, 1);
|
||||||
|
|
||||||
|
/* Set Hotplug detect for DP */
|
||||||
|
s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
|
||||||
|
}
|
||||||
|
|
||||||
|
void exynos_set_dp_phy(unsigned int onoff)
|
||||||
|
{
|
||||||
|
set_dp_phy_ctrl(onoff);
|
||||||
|
}
|
||||||
|
#endif
|
|
@ -29,6 +29,7 @@
|
||||||
#include <netdev.h>
|
#include <netdev.h>
|
||||||
#include <spi.h>
|
#include <spi.h>
|
||||||
#include <asm/arch/cpu.h>
|
#include <asm/arch/cpu.h>
|
||||||
|
#include <asm/arch/dwmmc.h>
|
||||||
#include <asm/arch/gpio.h>
|
#include <asm/arch/gpio.h>
|
||||||
#include <asm/arch/mmc.h>
|
#include <asm/arch/mmc.h>
|
||||||
#include <asm/arch/pinmux.h>
|
#include <asm/arch/pinmux.h>
|
||||||
|
@ -37,39 +38,9 @@
|
||||||
#include <asm/arch/dp_info.h>
|
#include <asm/arch/dp_info.h>
|
||||||
#include <power/pmic.h>
|
#include <power/pmic.h>
|
||||||
#include <power/max77686_pmic.h>
|
#include <power/max77686_pmic.h>
|
||||||
#include <tmu.h>
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
#if defined CONFIG_EXYNOS_TMU
|
|
||||||
/*
|
|
||||||
* Boot Time Thermal Analysis for SoC temperature threshold breach
|
|
||||||
*/
|
|
||||||
static void boot_temp_check(void)
|
|
||||||
{
|
|
||||||
int temp;
|
|
||||||
|
|
||||||
switch (tmu_monitor(&temp)) {
|
|
||||||
/* Status TRIPPED ans WARNING means corresponding threshold breach */
|
|
||||||
case TMU_STATUS_TRIPPED:
|
|
||||||
puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
|
|
||||||
set_ps_hold_ctrl();
|
|
||||||
hang();
|
|
||||||
break;
|
|
||||||
case TMU_STATUS_WARNING:
|
|
||||||
puts("EXYNOS_TMU: WARNING! Temperature very high\n");
|
|
||||||
break;
|
|
||||||
/*
|
|
||||||
* TMU_STATUS_INIT means something is wrong with temperature sensing
|
|
||||||
* and TMU status was changed back from NORMAL to INIT.
|
|
||||||
*/
|
|
||||||
case TMU_STATUS_INIT:
|
|
||||||
default:
|
|
||||||
debug("EXYNOS_TMU: Unknown TMU state\n");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_USB_EHCI_EXYNOS
|
#ifdef CONFIG_USB_EHCI_EXYNOS
|
||||||
int board_usb_vbus_init(void)
|
int board_usb_vbus_init(void)
|
||||||
{
|
{
|
||||||
|
@ -102,14 +73,6 @@ int board_init(void)
|
||||||
{
|
{
|
||||||
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
|
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
|
||||||
|
|
||||||
#if defined CONFIG_EXYNOS_TMU
|
|
||||||
if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
|
|
||||||
debug("%s: Failed to init TMU\n", __func__);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
boot_temp_check();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_EXYNOS_SPI
|
#ifdef CONFIG_EXYNOS_SPI
|
||||||
spi_init();
|
spi_init();
|
||||||
#endif
|
#endif
|
||||||
|
@ -124,14 +87,13 @@ int board_init(void)
|
||||||
|
|
||||||
int dram_init(void)
|
int dram_init(void)
|
||||||
{
|
{
|
||||||
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
|
int i;
|
||||||
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
|
u32 addr;
|
||||||
+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
|
|
||||||
+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
|
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
|
||||||
+ get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
|
addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
|
||||||
+ get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
|
gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
|
||||||
+ get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
|
}
|
||||||
+ get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -254,57 +216,15 @@ int power_init_board(void)
|
||||||
|
|
||||||
void dram_init_banksize(void)
|
void dram_init_banksize(void)
|
||||||
{
|
{
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
int i;
|
||||||
gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
|
u32 addr, size;
|
||||||
PHYS_SDRAM_1_SIZE);
|
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
|
||||||
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
|
addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
|
||||||
gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
|
size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
|
||||||
PHYS_SDRAM_2_SIZE);
|
gd->bd->bi_dram[i].start = addr;
|
||||||
gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
|
gd->bd->bi_dram[i].size = size;
|
||||||
gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
|
|
||||||
PHYS_SDRAM_3_SIZE);
|
|
||||||
gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
|
|
||||||
gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
|
|
||||||
PHYS_SDRAM_4_SIZE);
|
|
||||||
gd->bd->bi_dram[4].start = PHYS_SDRAM_5;
|
|
||||||
gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5,
|
|
||||||
PHYS_SDRAM_5_SIZE);
|
|
||||||
gd->bd->bi_dram[5].start = PHYS_SDRAM_6;
|
|
||||||
gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6,
|
|
||||||
PHYS_SDRAM_6_SIZE);
|
|
||||||
gd->bd->bi_dram[6].start = PHYS_SDRAM_7;
|
|
||||||
gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7,
|
|
||||||
PHYS_SDRAM_7_SIZE);
|
|
||||||
gd->bd->bi_dram[7].start = PHYS_SDRAM_8;
|
|
||||||
gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8,
|
|
||||||
PHYS_SDRAM_8_SIZE);
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_OF_CONTROL
|
|
||||||
static int decode_sromc(const void *blob, struct fdt_sromc *config)
|
|
||||||
{
|
|
||||||
int err;
|
|
||||||
int node;
|
|
||||||
|
|
||||||
node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
|
|
||||||
if (node < 0) {
|
|
||||||
debug("Could not find SROMC node\n");
|
|
||||||
return node;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
config->bank = fdtdec_get_int(blob, node, "bank", 0);
|
|
||||||
config->width = fdtdec_get_int(blob, node, "width", 2);
|
|
||||||
|
|
||||||
err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
|
|
||||||
FDT_SROM_TIMING_COUNT);
|
|
||||||
if (err < 0) {
|
|
||||||
debug("Could not decode SROMC configuration\n");
|
|
||||||
return -FDT_ERR_NOTFOUND;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|
||||||
int board_eth_init(bd_t *bis)
|
int board_eth_init(bd_t *bis)
|
||||||
{
|
{
|
||||||
|
@ -313,27 +233,6 @@ int board_eth_init(bd_t *bis)
|
||||||
struct fdt_sromc config;
|
struct fdt_sromc config;
|
||||||
fdt_addr_t base_addr;
|
fdt_addr_t base_addr;
|
||||||
|
|
||||||
#ifdef CONFIG_OF_CONTROL
|
|
||||||
int node;
|
|
||||||
|
|
||||||
node = decode_sromc(gd->fdt_blob, &config);
|
|
||||||
if (node < 0) {
|
|
||||||
debug("%s: Could not find sromc configuration\n", __func__);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
|
|
||||||
if (node < 0) {
|
|
||||||
debug("%s: Could not find lan9215 configuration\n", __func__);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* We now have a node, so any problems from now on are errors */
|
|
||||||
base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
|
|
||||||
if (base_addr == FDT_ADDR_T_NONE) {
|
|
||||||
debug("%s: Could not find lan9215 address\n", __func__);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
/* Non-FDT configuration - bank number and timing parameters*/
|
/* Non-FDT configuration - bank number and timing parameters*/
|
||||||
config.bank = CONFIG_ENV_SROM_BANK;
|
config.bank = CONFIG_ENV_SROM_BANK;
|
||||||
config.width = 2;
|
config.width = 2;
|
||||||
|
@ -346,7 +245,6 @@ int board_eth_init(bd_t *bis)
|
||||||
config.timing[FDT_SROM_TACP] = 0x09;
|
config.timing[FDT_SROM_TACP] = 0x09;
|
||||||
config.timing[FDT_SROM_PMC] = 0x01;
|
config.timing[FDT_SROM_PMC] = 0x01;
|
||||||
base_addr = CONFIG_SMC911X_BASE;
|
base_addr = CONFIG_SMC911X_BASE;
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Ethernet needs data bus width of 16 bits */
|
/* Ethernet needs data bus width of 16 bits */
|
||||||
if (config.width != 2) {
|
if (config.width != 2) {
|
||||||
|
@ -376,17 +274,7 @@ int board_eth_init(bd_t *bis)
|
||||||
#ifdef CONFIG_DISPLAY_BOARDINFO
|
#ifdef CONFIG_DISPLAY_BOARDINFO
|
||||||
int checkboard(void)
|
int checkboard(void)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_OF_CONTROL
|
|
||||||
const char *board_name;
|
|
||||||
|
|
||||||
board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
|
|
||||||
if (board_name == NULL)
|
|
||||||
printf("\nUnknown Board\n");
|
|
||||||
else
|
|
||||||
printf("\nBoard: %s\n", board_name);
|
|
||||||
#else
|
|
||||||
printf("\nBoard: SMDK5250\n");
|
printf("\nBoard: SMDK5250\n");
|
||||||
#endif
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -394,48 +282,54 @@ int checkboard(void)
|
||||||
#ifdef CONFIG_GENERIC_MMC
|
#ifdef CONFIG_GENERIC_MMC
|
||||||
int board_mmc_init(bd_t *bis)
|
int board_mmc_init(bd_t *bis)
|
||||||
{
|
{
|
||||||
int err;
|
int err, ret = 0, index, bus_width;
|
||||||
|
u32 base;
|
||||||
|
|
||||||
err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
|
err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
|
||||||
if (err) {
|
if (err)
|
||||||
debug("SDMMC0 not configured\n");
|
debug("SDMMC0 not configured\n");
|
||||||
return err;
|
ret |= err;
|
||||||
}
|
|
||||||
|
|
||||||
err = s5p_mmc_init(0, 8);
|
/*EMMC: dwmmc Channel-0 with 8 bit bus width */
|
||||||
return err;
|
index = 0;
|
||||||
|
base = samsung_get_base_mmc() + (0x10000 * index);
|
||||||
|
bus_width = 8;
|
||||||
|
err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL);
|
||||||
|
if (err)
|
||||||
|
debug("dwmmc Channel-0 init failed\n");
|
||||||
|
ret |= err;
|
||||||
|
|
||||||
|
err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
|
||||||
|
if (err)
|
||||||
|
debug("SDMMC2 not configured\n");
|
||||||
|
ret |= err;
|
||||||
|
|
||||||
|
/*SD: dwmmc Channel-2 with 4 bit bus width */
|
||||||
|
index = 2;
|
||||||
|
base = samsung_get_base_mmc() + (0x10000 * index);
|
||||||
|
bus_width = 4;
|
||||||
|
err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL);
|
||||||
|
if (err)
|
||||||
|
debug("dwmmc Channel-2 init failed\n");
|
||||||
|
ret |= err;
|
||||||
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static int board_uart_init(void)
|
static int board_uart_init(void)
|
||||||
{
|
{
|
||||||
int err;
|
int err, uart_id, ret = 0;
|
||||||
|
|
||||||
err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
|
for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
|
||||||
if (err) {
|
err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
|
||||||
debug("UART0 not configured\n");
|
if (err) {
|
||||||
return err;
|
debug("UART%d not configured\n",
|
||||||
|
(uart_id - PERIPH_ID_UART0));
|
||||||
|
ret |= err;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
return ret;
|
||||||
err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
|
|
||||||
if (err) {
|
|
||||||
debug("UART1 not configured\n");
|
|
||||||
return err;
|
|
||||||
}
|
|
||||||
|
|
||||||
err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
|
|
||||||
if (err) {
|
|
||||||
debug("UART2 not configured\n");
|
|
||||||
return err;
|
|
||||||
}
|
|
||||||
|
|
||||||
err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
|
|
||||||
if (err) {
|
|
||||||
debug("UART3 not configured\n");
|
|
||||||
return err;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_BOARD_EARLY_INIT_F
|
#ifdef CONFIG_BOARD_EARLY_INIT_F
|
||||||
|
@ -448,7 +342,7 @@ int board_early_init_f(void)
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
#ifdef CONFIG_SYS_I2C_INIT_BOARD
|
#ifdef CONFIG_SYS_I2C_INIT_BOARD
|
||||||
board_i2c_init(gd->fdt_blob);
|
board_i2c_init(NULL);
|
||||||
#endif
|
#endif
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
@ -477,7 +371,6 @@ void exynos_set_dp_phy(unsigned int onoff)
|
||||||
set_dp_phy_ctrl(onoff);
|
set_dp_phy_ctrl(onoff);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifndef CONFIG_OF_CONTROL
|
|
||||||
vidinfo_t panel_info = {
|
vidinfo_t panel_info = {
|
||||||
.vl_freq = 60,
|
.vl_freq = 60,
|
||||||
.vl_col = 2560,
|
.vl_col = 2560,
|
||||||
|
@ -543,13 +436,9 @@ static struct exynos_dp_platform_data dp_platform_data = {
|
||||||
.edp_dev_info = &edp_info,
|
.edp_dev_info = &edp_info,
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif
|
|
||||||
void init_panel_info(vidinfo_t *vid)
|
void init_panel_info(vidinfo_t *vid)
|
||||||
{
|
{
|
||||||
#ifndef CONFIG_OF_CONTROL
|
vid->rgb_mode = MODE_RGB_P;
|
||||||
vid->rgb_mode = MODE_RGB_P,
|
|
||||||
|
|
||||||
exynos_set_dp_platform_data(&dp_platform_data);
|
exynos_set_dp_platform_data(&dp_platform_data);
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -319,10 +319,10 @@ void lcd_ctrl_init(void *lcdbase)
|
||||||
#ifdef CONFIG_OF_CONTROL
|
#ifdef CONFIG_OF_CONTROL
|
||||||
if (exynos_fimd_parse_dt(gd->fdt_blob))
|
if (exynos_fimd_parse_dt(gd->fdt_blob))
|
||||||
debug("Can't get proper panel info\n");
|
debug("Can't get proper panel info\n");
|
||||||
#endif
|
#else
|
||||||
/* initialize parameters which is specific to panel. */
|
/* initialize parameters which is specific to panel. */
|
||||||
init_panel_info(&panel_info);
|
init_panel_info(&panel_info);
|
||||||
|
#endif
|
||||||
panel_width = panel_info.vl_width;
|
panel_width = panel_info.vl_width;
|
||||||
panel_height = panel_info.vl_height;
|
panel_height = panel_info.vl_height;
|
||||||
|
|
||||||
|
|
|
@ -98,6 +98,10 @@
|
||||||
#define CONFIG_MMC
|
#define CONFIG_MMC
|
||||||
#define CONFIG_SDHCI
|
#define CONFIG_SDHCI
|
||||||
#define CONFIG_S5P_SDHCI
|
#define CONFIG_S5P_SDHCI
|
||||||
|
#define CONFIG_DWMMC
|
||||||
|
#define CONFIG_EXYNOS_DWMMC
|
||||||
|
#define CONFIG_SUPPORT_EMMC_BOOT
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_BOARD_EARLY_INIT_F
|
#define CONFIG_BOARD_EARLY_INIT_F
|
||||||
|
|
||||||
|
@ -230,6 +234,10 @@
|
||||||
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
|
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
|
||||||
|
|
||||||
#define CONFIG_DOS_PARTITION
|
#define CONFIG_DOS_PARTITION
|
||||||
|
#define CONFIG_EFI_PARTITION
|
||||||
|
#define CONFIG_CMD_PART
|
||||||
|
#define CONFIG_PARTITION_UUIDS
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_IRAM_STACK 0x02050000
|
#define CONFIG_IRAM_STACK 0x02050000
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue
Block a user