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arm: socfpga: set skew settings for ethernet phy
Set the PHY skew settings for the ethernet phy on the SOCFPGA Cyclone5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
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@ -12,7 +12,9 @@
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#include <usb/s3c_udc.h>
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#include <usb/s3c_udc.h>
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#include <usb_mass_storage.h>
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#include <usb_mass_storage.h>
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#include <micrel.h>
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#include <netdev.h>
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#include <netdev.h>
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#include <phy.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -44,6 +46,20 @@ int board_init(void)
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return 0;
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return 0;
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}
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}
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int board_phy_config(struct phy_device *phydev)
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{
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/*
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* These skew settings for the KSZ9021 ethernet phy is required for ethernet
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* to work reliably on most flavors of cyclone5 boards.
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*/
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ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
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0x0);
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ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
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0x0);
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ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
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0xf0f0);
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}
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#ifdef CONFIG_USB_GADGET
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#ifdef CONFIG_USB_GADGET
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struct s3c_plat_otg_data socfpga_otg_data = {
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struct s3c_plat_otg_data socfpga_otg_data = {
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
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