mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-29 08:00:26 +09:00
pinctrl: rockchip: Split the common set_pull() func into per Soc
As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
parent
956362c84b
commit
743a77373b
@ -53,6 +53,27 @@ static void rk3036_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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*bit = pin_num % RK3036_PULL_PINS_PER_REG;
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};
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static int rk3036_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit;
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u32 data;
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if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
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pull != PIN_CONFIG_BIAS_DISABLE)
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return -ENOTSUPP;
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rk3036_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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data = BIT(bit + 16);
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if (pull == PIN_CONFIG_BIAS_DISABLE)
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data |= BIT(bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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static struct rockchip_pin_bank rk3036_pin_banks[] = {
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PIN_BANK(0, 32, "gpio0"),
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PIN_BANK(1, 32, "gpio1"),
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@ -66,7 +87,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
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.type = RK3036,
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.grf_mux_offset = 0xa8,
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.set_mux = rk3036_set_mux,
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.pull_calc_reg = rk3036_calc_pull_reg_and_bit,
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.set_pull = rk3036_set_pull,
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};
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static const struct udevice_id rk3036_pinctrl_ids[] = {
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@ -152,6 +152,27 @@ static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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*bit = pin_num % RK3128_PULL_PINS_PER_REG;
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}
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static int rk3128_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit;
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u32 data;
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if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
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pull != PIN_CONFIG_BIAS_DISABLE)
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return -ENOTSUPP;
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rk3128_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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data = BIT(bit + 16);
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if (pull == PIN_CONFIG_BIAS_DISABLE)
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data |= BIT(bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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static struct rockchip_pin_bank rk3128_pin_banks[] = {
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PIN_BANK(0, 32, "gpio0"),
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PIN_BANK(1, 32, "gpio1"),
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@ -170,7 +191,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
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.iomux_routes = rk3128_mux_route_data,
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.niomux_routes = ARRAY_SIZE(rk3128_mux_route_data),
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.set_mux = rk3128_set_mux,
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.pull_calc_reg = rk3128_calc_pull_reg_and_bit,
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.set_pull = rk3128_set_pull,
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};
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static const struct udevice_id rk3128_pinctrl_ids[] = {
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@ -71,6 +71,33 @@ static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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}
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}
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static int rk3188_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit, type;
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u32 data;
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if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
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return -ENOTSUPP;
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rk3188_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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type = bank->pull_type[pin_num / 8];
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ret = rockchip_translate_pull_value(type, pull);
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if (ret < 0) {
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debug("unsupported pull setting %d\n", pull);
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return ret;
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}
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/* enable the write to the equivalent lower bits */
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data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
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data |= (ret << bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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static struct rockchip_pin_bank rk3188_pin_banks[] = {
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PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
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PIN_BANK(1, 32, "gpio1"),
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@ -85,7 +112,7 @@ static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
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.type = RK3188,
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.grf_mux_offset = 0x60,
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.set_mux = rk3188_set_mux,
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.pull_calc_reg = rk3188_calc_pull_reg_and_bit,
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.set_pull = rk3188_set_pull,
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};
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static const struct udevice_id rk3188_pinctrl_ids[] = {
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@ -191,6 +191,33 @@ static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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}
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static int rk3228_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit, type;
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u32 data;
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if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
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return -ENOTSUPP;
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rk3228_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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type = bank->pull_type[pin_num / 8];
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ret = rockchip_translate_pull_value(type, pull);
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if (ret < 0) {
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debug("unsupported pull setting %d\n", pull);
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return ret;
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}
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/* enable the write to the equivalent lower bits */
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data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
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data |= (ret << bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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#define RK3228_DRV_GRF_OFFSET 0x200
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static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
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@ -247,7 +274,7 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
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.iomux_routes = rk3228_mux_route_data,
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.niomux_routes = ARRAY_SIZE(rk3228_mux_route_data),
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.set_mux = rk3228_set_mux,
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.pull_calc_reg = rk3228_calc_pull_reg_and_bit,
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.set_pull = rk3228_set_pull,
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.set_drive = rk3228_set_drive,
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};
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@ -82,10 +82,6 @@ static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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if (bank->bank_num == 0) {
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*regmap = priv->regmap_pmu;
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*reg = RK3288_PULL_PMU_OFFSET;
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*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
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*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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} else {
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*regmap = priv->regmap_base;
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*reg = RK3288_PULL_OFFSET;
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@ -93,11 +89,39 @@ static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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/* correct the offset, as we're starting with the 2nd bank */
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*reg -= 0x10;
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*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
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}
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*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
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*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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}
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static int rk3288_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit, type;
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u32 data;
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if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
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return -ENOTSUPP;
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rk3288_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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type = bank->pull_type[pin_num / 8];
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ret = rockchip_translate_pull_value(type, pull);
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if (ret < 0) {
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debug("unsupported pull setting %d\n", pull);
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return ret;
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}
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/* enable the write to the equivalent lower bits */
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data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
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data |= (ret << bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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#define RK3288_DRV_PMU_OFFSET 0x70
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@ -199,7 +223,7 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
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.iomux_routes = rk3288_mux_route_data,
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.niomux_routes = ARRAY_SIZE(rk3288_mux_route_data),
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.set_mux = rk3288_set_mux,
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.pull_calc_reg = rk3288_calc_pull_reg_and_bit,
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.set_pull = rk3288_set_pull,
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.set_drive = rk3288_set_drive,
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};
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@ -174,6 +174,33 @@ static void rk3328_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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}
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static int rk3328_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit, type;
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u32 data;
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if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
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return -ENOTSUPP;
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rk3328_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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type = bank->pull_type[pin_num / 8];
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ret = rockchip_translate_pull_value(type, pull);
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if (ret < 0) {
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debug("unsupported pull setting %d\n", pull);
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return ret;
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}
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/* enable the write to the equivalent lower bits */
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data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
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data |= (ret << bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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#define RK3328_DRV_GRF_OFFSET 0x200
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static void rk3328_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
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@ -262,7 +289,7 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
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.iomux_routes = rk3328_mux_route_data,
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.niomux_routes = ARRAY_SIZE(rk3328_mux_route_data),
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.set_mux = rk3328_set_mux,
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.pull_calc_reg = rk3328_calc_pull_reg_and_bit,
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.set_pull = rk3328_set_pull,
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.set_drive = rk3328_set_drive,
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.schmitt_calc_reg = rk3328_calc_schmitt_reg_and_bit,
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};
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@ -48,10 +48,6 @@ static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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if (bank->bank_num == 0) {
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*regmap = priv->regmap_pmu;
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*reg = RK3368_PULL_PMU_OFFSET;
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*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
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*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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} else {
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*regmap = priv->regmap_base;
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*reg = RK3368_PULL_GRF_OFFSET;
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@ -59,11 +55,39 @@ static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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/* correct the offset, as we're starting with the 2nd bank */
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*reg -= 0x10;
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*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
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}
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*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
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*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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}
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static int rk3368_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit, type;
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u32 data;
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if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
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return -ENOTSUPP;
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rk3368_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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type = bank->pull_type[pin_num / 8];
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ret = rockchip_translate_pull_value(type, pull);
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if (ret < 0) {
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debug("unsupported pull setting %d\n", pull);
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return ret;
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}
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/* enable the write to the equivalent lower bits */
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data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
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data |= (ret << bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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#define RK3368_DRV_PMU_OFFSET 0x20
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@ -136,7 +160,7 @@ static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
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.grf_mux_offset = 0x0,
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.pmu_mux_offset = 0x0,
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.set_mux = rk3368_set_mux,
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.pull_calc_reg = rk3368_calc_pull_reg_and_bit,
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.set_pull = rk3368_set_pull,
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.set_drive = rk3368_set_drive,
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};
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@ -98,10 +98,6 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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*reg = RK3399_PULL_PMU_OFFSET;
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*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
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*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
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*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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} else {
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*regmap = priv->regmap_base;
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*reg = RK3399_PULL_GRF_OFFSET;
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@ -109,11 +105,39 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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/* correct the offset, as we're starting with the 3rd bank */
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*reg -= 0x20;
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*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
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}
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*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
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*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
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*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
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}
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static int rk3399_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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{
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struct regmap *regmap;
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int reg, ret;
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u8 bit, type;
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u32 data;
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if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
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return -ENOTSUPP;
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rk3399_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
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type = bank->pull_type[pin_num / 8];
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ret = rockchip_translate_pull_value(type, pull);
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if (ret < 0) {
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debug("unsupported pull setting %d\n", pull);
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return ret;
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}
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/* enable the write to the equivalent lower bits */
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data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
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data |= (ret << bit);
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ret = regmap_write(regmap, reg, data);
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return ret;
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}
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static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
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@ -275,7 +299,7 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
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.iomux_routes = rk3399_mux_route_data,
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.niomux_routes = ARRAY_SIZE(rk3399_mux_route_data),
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.set_mux = rk3399_set_mux,
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.pull_calc_reg = rk3399_calc_pull_reg_and_bit,
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.set_pull = rk3399_set_pull,
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.set_drive = rk3399_set_drive,
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};
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@ -270,61 +270,35 @@ static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
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},
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};
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static int rockchip_set_pull(struct rockchip_pin_bank *bank,
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int pin_num, int pull)
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int rockchip_translate_pull_value(int type, int pull)
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{
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struct rockchip_pinctrl_priv *priv = bank->priv;
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struct rockchip_pin_ctrl *ctrl = priv->ctrl;
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struct regmap *regmap;
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int reg, ret, i, pull_type;
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u8 bit;
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u32 data;
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int i, ret;
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debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num,
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pin_num, pull);
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ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
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switch (ctrl->type) {
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case RK3036:
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case RK3128:
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data = BIT(bit + 16);
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if (pull == PIN_CONFIG_BIAS_DISABLE)
|
||||
data |= BIT(bit);
|
||||
ret = regmap_write(regmap, reg, data);
|
||||
break;
|
||||
case RV1108:
|
||||
case RK3188:
|
||||
case RK3288:
|
||||
case RK3368:
|
||||
case RK3399:
|
||||
pull_type = bank->pull_type[pin_num / 8];
|
||||
ret = -EINVAL;
|
||||
for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
|
||||
for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[type]);
|
||||
i++) {
|
||||
if (rockchip_pull_list[pull_type][i] == pull) {
|
||||
if (rockchip_pull_list[type][i] == pull) {
|
||||
ret = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (ret < 0) {
|
||||
debug("unsupported pull setting %d\n", pull);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
/* enable the write to the equivalent lower bits */
|
||||
data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
|
||||
data |= (ret << bit);
|
||||
static int rockchip_set_pull(struct rockchip_pin_bank *bank,
|
||||
int pin_num, int pull)
|
||||
{
|
||||
struct rockchip_pinctrl_priv *priv = bank->priv;
|
||||
struct rockchip_pin_ctrl *ctrl = priv->ctrl;
|
||||
|
||||
ret = regmap_write(regmap, reg, data);
|
||||
break;
|
||||
default:
|
||||
debug("unsupported pinctrl type\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num,
|
||||
pin_num, pull);
|
||||
|
||||
return ret;
|
||||
if (!ctrl->set_pull)
|
||||
return -ENOTSUPP;
|
||||
|
||||
return ctrl->set_pull(bank, pin_num, pull);
|
||||
}
|
||||
|
||||
static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
|
||||
@ -350,28 +324,6 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
|
||||
return regmap_write(regmap, reg, data);
|
||||
}
|
||||
|
||||
/*
|
||||
* Pinconf_ops handling
|
||||
*/
|
||||
static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
|
||||
unsigned int pull)
|
||||
{
|
||||
switch (ctrl->type) {
|
||||
case RK3036:
|
||||
case RK3128:
|
||||
return (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT ||
|
||||
pull == PIN_CONFIG_BIAS_DISABLE);
|
||||
case RV1108:
|
||||
case RK3188:
|
||||
case RK3288:
|
||||
case RK3368:
|
||||
case RK3399:
|
||||
return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT);
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/* set the pin config settings for a specified pin */
|
||||
static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
|
||||
u32 pin, u32 param, u32 arg)
|
||||
@ -382,21 +334,10 @@ static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
|
||||
|
||||
switch (param) {
|
||||
case PIN_CONFIG_BIAS_DISABLE:
|
||||
rc = rockchip_set_pull(bank, pin, param);
|
||||
if (rc)
|
||||
return rc;
|
||||
break;
|
||||
|
||||
case PIN_CONFIG_BIAS_PULL_UP:
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
|
||||
case PIN_CONFIG_BIAS_BUS_HOLD:
|
||||
if (!rockchip_pinconf_pull_valid(ctrl, param))
|
||||
return -ENOTSUPP;
|
||||
|
||||
if (!arg)
|
||||
return -EINVAL;
|
||||
|
||||
rc = rockchip_set_pull(bank, pin, param);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
@ -279,10 +279,8 @@ struct rockchip_pin_ctrl {
|
||||
|
||||
int (*set_mux)(struct rockchip_pin_bank *bank,
|
||||
int pin, int mux);
|
||||
|
||||
void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
|
||||
int pin_num, struct regmap **regmap,
|
||||
int *reg, u8 *bit);
|
||||
int (*set_pull)(struct rockchip_pin_bank *bank,
|
||||
int pin_num, int pull);
|
||||
int (*set_drive)(struct rockchip_pin_bank *bank,
|
||||
int pin_num, int strength);
|
||||
int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
|
||||
@ -306,5 +304,6 @@ bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
|
||||
int mux, u32 *reg, u32 *value);
|
||||
int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask);
|
||||
int rockchip_translate_drive_value(int type, int strength);
|
||||
int rockchip_translate_pull_value(int type, int pull);
|
||||
|
||||
#endif /* __DRIVERS_PINCTRL_ROCKCHIP_H */
|
||||
|
@ -128,6 +128,34 @@ static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
|
||||
*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
|
||||
}
|
||||
|
||||
static int rv1108_set_pull(struct rockchip_pin_bank *bank,
|
||||
int pin_num, int pull)
|
||||
{
|
||||
struct regmap *regmap;
|
||||
int reg, ret;
|
||||
u8 bit, type;
|
||||
u32 data;
|
||||
|
||||
if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
|
||||
return -ENOTSUPP;
|
||||
|
||||
rv1108_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit);
|
||||
type = bank->pull_type[pin_num / 8];
|
||||
ret = rockchip_translate_pull_value(type, pull);
|
||||
if (ret < 0) {
|
||||
debug("unsupported pull setting %d\n", pull);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* enable the write to the equivalent lower bits */
|
||||
data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
|
||||
|
||||
data |= (ret << bit);
|
||||
ret = regmap_write(regmap, reg, data);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define RV1108_DRV_PMU_OFFSET 0x20
|
||||
#define RV1108_DRV_GRF_OFFSET 0x210
|
||||
|
||||
@ -229,7 +257,7 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
|
||||
.iomux_recalced = rv1108_mux_recalced_data,
|
||||
.niomux_recalced = ARRAY_SIZE(rv1108_mux_recalced_data),
|
||||
.set_mux = rv1108_set_mux,
|
||||
.pull_calc_reg = rv1108_calc_pull_reg_and_bit,
|
||||
.set_pull = rv1108_set_pull,
|
||||
.set_drive = rv1108_set_drive,
|
||||
.schmitt_calc_reg = rv1108_calc_schmitt_reg_and_bit,
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user