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u-boot: Fix CPU2 errata on MPC8548CDS board
This patch apply workaround of CPU2 errata on MPC8548CDS board. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
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@ -51,6 +51,7 @@ int checkboard (void)
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{
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{
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volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
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volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
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/* PCI slot in USER bits CSR[6:7] by convention. */
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/* PCI slot in USER bits CSR[6:7] by convention. */
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uint pci_slot = get_pci_slot ();
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uint pci_slot = get_pci_slot ();
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@ -89,6 +90,12 @@ int checkboard (void)
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*/
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*/
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local_bus_init ();
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local_bus_init ();
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/*
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* Fix CPU2 errata: A core hang possible while executing a
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* msync instruction and a snoopable transaction from an I/O
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* master tagged to make quick forward progress is present.
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*/
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ecm->eebpcr |= (1 << 16);
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/*
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/*
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* Hack TSEC 3 and 4 IO voltages.
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* Hack TSEC 3 and 4 IO voltages.
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