brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-09-27 23:20:26 +09:00
Code Issues Projects Releases Wiki Activity

xes: Add board_flash_wp_on()

Browse Source 
Add board_flash_wp_on() to check a pca9557 gpio pin to see
if non-volatile memory write protection is enabled.

Previously, write protected NOR flashes would fail initialization which
resulted in a bootup error such as:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
 ## Unknown FLASH on Bank 2 - Size = 0x00000000 = 0 MB
 *** failed ***
 ### ERROR ### Please RESET the board ###

With this patch, NOR flash initialization is skipped:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: Uninitialized - Write Protect On
 L2:    1024 KB enabled
 NAND:  1024 MiB
 ...

Note that flash related commands such as flinfo and saveenv will error
out when flash write protection is enabled.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
John Schmoller 2010-10-22 00:20:25 -05:00 committed by Kumar Gala
parent 92af6549b8
commit 72fb68d53c
2 changed files with 16 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
board/xes/common/fsl_8xxx_misc.c
View File

@ -22,6 +22,21 @@
#include <common.h>
#include <asm/mmu.h>
#ifdef CONFIG_PCA953X
#include <pca953x.h>
/*
* Determine if a board's flashes are write protected
*/
int board_flash_wp_on(void)
{
if (pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) &
CONFIG_SYS_PCA953X_NVM_WP)
return 1;
return 0;
}
#endif
/*
* Return a board's derivative model number. For example:

2
include/configs/XPEDITE5200.h
View File

@ -251,7 +251,7 @@
#define CONFIG_SYS_PCA953X_BRD_CFG2 0x04
#define CONFIG_SYS_PCA953X_XMC_ROOT0 0x08
#define CONFIG_SYS_PCA953X_FLASH_PASS_CS 0x10
#define CONFIG_SYS_PCA953X_FLASH_WP 0x20
#define CONFIG_SYS_PCA953X_NVM_WP 0x20
#define CONFIG_SYS_PCA953X_MONARCH 0x40
#define CONFIG_SYS_PCA953X_EREADY 0x80