- fsl_esdhc driver cleanup
- spl_mmc bug fix to avoid access wrong emmc partition
This commit is contained in:
Tom Rini 2019-10-30 09:06:33 -04:00
commit 700336f7e4
2 changed files with 6 additions and 42 deletions

View File

@ -343,8 +343,6 @@ int spl_mmc_load(struct spl_image_info *spl_image,
} }
} }
raw_sect = spl_mmc_get_uboot_raw_sector(mmc);
boot_mode = spl_boot_mode(bootdev->boot_device); boot_mode = spl_boot_mode(bootdev->boot_device);
err = -EINVAL; err = -EINVAL;
switch (boot_mode) { switch (boot_mode) {
@ -383,6 +381,9 @@ int spl_mmc_load(struct spl_image_info *spl_image,
if (!err) if (!err)
return err; return err;
} }
raw_sect = spl_mmc_get_uboot_raw_sector(mmc);
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
err = mmc_load_image_raw_partition(spl_image, mmc, raw_part, err = mmc_load_image_raw_partition(spl_image, mmc, raw_part,
raw_sect); raw_sect);

View File

@ -23,10 +23,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <dm.h> #include <dm.h>
#if !CONFIG_IS_ENABLED(BLK)
#include "mmc_private.h"
#endif
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#define SDHCI_IRQ_EN_BITS (IRQSTATEN_CC | IRQSTATEN_TC | \ #define SDHCI_IRQ_EN_BITS (IRQSTATEN_CC | IRQSTATEN_TC | \
@ -35,7 +31,6 @@ DECLARE_GLOBAL_DATA_PTR;
IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \ IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \
IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \ IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \
IRQSTATEN_DINT) IRQSTATEN_DINT)
#define ESDHC_DRIVER_STAGE_VALUE 0xffffffff
struct fsl_esdhc { struct fsl_esdhc {
uint dsaddr; /* SDMA system address register */ uint dsaddr; /* SDMA system address register */
@ -98,7 +93,7 @@ struct fsl_esdhc_priv {
struct clk per_clk; struct clk per_clk;
unsigned int clock; unsigned int clock;
unsigned int bus_width; unsigned int bus_width;
#if !CONFIG_IS_ENABLED(BLK) #if !CONFIG_IS_ENABLED(DM_MMC)
struct mmc *mmc; struct mmc *mmc;
#endif #endif
struct udevice *dev; struct udevice *dev;
@ -506,7 +501,6 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
struct fsl_esdhc *regs = priv->esdhc_regs; struct fsl_esdhc *regs = priv->esdhc_regs;
int div = 1; int div = 1;
int pre_div = 2; int pre_div = 2;
int ddr_pre_div = mmc->ddr_mode ? 2 : 1;
unsigned int sdhc_clk = priv->sdhc_clk; unsigned int sdhc_clk = priv->sdhc_clk;
u32 time_out; u32 time_out;
u32 value; u32 value;
@ -515,10 +509,10 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
if (clock < mmc->cfg->f_min) if (clock < mmc->cfg->f_min)
clock = mmc->cfg->f_min; clock = mmc->cfg->f_min;
while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock && pre_div < 256) while (sdhc_clk / (16 * pre_div) > clock && pre_div < 256)
pre_div *= 2; pre_div *= 2;
while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16) while (sdhc_clk / (div * pre_div) > clock && div < 16)
div++; div++;
pre_div >>= 1; pre_div >>= 1;
@ -778,9 +772,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
cfg->host_caps = MMC_MODE_4BIT; cfg->host_caps = MMC_MODE_4BIT;
cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
#ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
cfg->host_caps |= MMC_MODE_DDR_52MHz;
#endif
if (priv->bus_width > 0) { if (priv->bus_width > 0) {
if (priv->bus_width < 8) if (priv->bus_width < 8)
@ -960,9 +951,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
fdt_addr_t addr; fdt_addr_t addr;
unsigned int val; unsigned int val;
struct mmc *mmc; struct mmc *mmc;
#if !CONFIG_IS_ENABLED(BLK)
struct blk_desc *bdesc;
#endif
int ret; int ret;
addr = dev_read_addr(dev); addr = dev_read_addr(dev);
@ -1028,32 +1016,12 @@ static int fsl_esdhc_probe(struct udevice *dev)
mmc = &plat->mmc; mmc = &plat->mmc;
mmc->cfg = &plat->cfg; mmc->cfg = &plat->cfg;
mmc->dev = dev; mmc->dev = dev;
#if !CONFIG_IS_ENABLED(BLK)
mmc->priv = priv;
/* Setup dsr related values */
mmc->dsr_imp = 0;
mmc->dsr = ESDHC_DRIVER_STAGE_VALUE;
/* Setup the universal parts of the block interface just once */
bdesc = mmc_get_blk_desc(mmc);
bdesc->if_type = IF_TYPE_MMC;
bdesc->removable = 1;
bdesc->devnum = mmc_get_next_devnum();
bdesc->block_read = mmc_bread;
bdesc->block_write = mmc_bwrite;
bdesc->block_erase = mmc_berase;
/* setup initial part type */
bdesc->part_type = mmc->cfg->part_type;
mmc_list_add(mmc);
#endif
upriv->mmc = mmc; upriv->mmc = mmc;
return esdhc_init_common(priv, mmc); return esdhc_init_common(priv, mmc);
} }
#if CONFIG_IS_ENABLED(DM_MMC)
static int fsl_esdhc_get_cd(struct udevice *dev) static int fsl_esdhc_get_cd(struct udevice *dev)
{ {
struct fsl_esdhc_priv *priv = dev_get_priv(dev); struct fsl_esdhc_priv *priv = dev_get_priv(dev);
@ -1086,30 +1054,25 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
.execute_tuning = fsl_esdhc_execute_tuning, .execute_tuning = fsl_esdhc_execute_tuning,
#endif #endif
}; };
#endif
static const struct udevice_id fsl_esdhc_ids[] = { static const struct udevice_id fsl_esdhc_ids[] = {
{ .compatible = "fsl,esdhc", }, { .compatible = "fsl,esdhc", },
{ /* sentinel */ } { /* sentinel */ }
}; };
#if CONFIG_IS_ENABLED(BLK)
static int fsl_esdhc_bind(struct udevice *dev) static int fsl_esdhc_bind(struct udevice *dev)
{ {
struct fsl_esdhc_plat *plat = dev_get_platdata(dev); struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
return mmc_bind(dev, &plat->mmc, &plat->cfg); return mmc_bind(dev, &plat->mmc, &plat->cfg);
} }
#endif
U_BOOT_DRIVER(fsl_esdhc) = { U_BOOT_DRIVER(fsl_esdhc) = {
.name = "fsl-esdhc-mmc", .name = "fsl-esdhc-mmc",
.id = UCLASS_MMC, .id = UCLASS_MMC,
.of_match = fsl_esdhc_ids, .of_match = fsl_esdhc_ids,
.ops = &fsl_esdhc_ops, .ops = &fsl_esdhc_ops,
#if CONFIG_IS_ENABLED(BLK)
.bind = fsl_esdhc_bind, .bind = fsl_esdhc_bind,
#endif
.probe = fsl_esdhc_probe, .probe = fsl_esdhc_probe,
.platdata_auto_alloc_size = sizeof(struct fsl_esdhc_plat), .platdata_auto_alloc_size = sizeof(struct fsl_esdhc_plat),
.priv_auto_alloc_size = sizeof(struct fsl_esdhc_priv), .priv_auto_alloc_size = sizeof(struct fsl_esdhc_priv),