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armv8: fsl-layerscape: add missing qe base address define
Add define for QUICC Engine register block base address. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> [York S: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
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@ -85,6 +85,8 @@
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#define GPIO3_BASE_ADDR (CONFIG_SYS_IMMR + 0x1320000)
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#define GPIO4_BASE_ADDR (CONFIG_SYS_IMMR + 0x1330000)
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#define QE_BASE_ADDR (CONFIG_SYS_IMMR + 0x1400000)
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#define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000)
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#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c00000)
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