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armv8: fsl-layerscape: add missing qe base address define

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Add define for QUICC Engine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Laurentiu Tudor 2018-08-27 17:33:57 +03:00 committed by York Sun
parent 87519a9ece
commit 6fae6a1fd6
1 changed files with 2 additions and 0 deletions
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2
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
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@ -85,6 +85,8 @@
#define GPIO3_BASE_ADDR (CONFIG_SYS_IMMR + 0x1320000)
#define GPIO4_BASE_ADDR (CONFIG_SYS_IMMR + 0x1330000)
#define QE_BASE_ADDR (CONFIG_SYS_IMMR + 0x1400000)
#define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000)
#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c00000)