mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-05 11:00:43 +09:00
VCMA9: use CFI driver (and remove the old one)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
This commit is contained in:
parent
0bf42feca1
commit
6d754843ff
@ -28,7 +28,7 @@ endif
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LIB = $(obj)lib$(BOARD).o
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COBJS := vcma9.o flash.o cmd_vcma9.o
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COBJS := vcma9.o cmd_vcma9.o
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COBJS += ../common/common_util.o
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SOBJS := lowlevel_init.o
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@ -1,432 +0,0 @@
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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ulong myflush (void);
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#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
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#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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#define CMD_READ_ARRAY 0x000000F0
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#define CMD_UNLOCK1 0x000000AA
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#define CMD_UNLOCK2 0x00000055
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#define CMD_ERASE_SETUP 0x00000080
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#define CMD_ERASE_CONFIRM 0x00000030
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#define CMD_PROGRAM 0x000000A0
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#define CMD_UNLOCK_BYPASS 0x00000020
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#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1)))
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#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1)))
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#define BIT_ERASE_DONE 0x00000080
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#define BIT_RDY_MASK 0x00000080
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#define BIT_PROGRAM_ERROR 0x00000020
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#define BIT_TIMEOUT 0x80000000 /* our flag */
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#define READY 1
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#define ERR 2
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#define TMO 4
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/*-----------------------------------------------------------------------
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*/
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ulong flash_init (void)
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{
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int i, j;
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ulong size = 0;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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ulong flashbase = 0;
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flash_info[i].flash_id =
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#if defined(CONFIG_AMD_LV400)
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(AMD_MANUFACT & FLASH_VENDMASK) |
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(AMD_ID_LV400B & FLASH_TYPEMASK);
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#elif defined(CONFIG_AMD_LV800)
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(AMD_MANUFACT & FLASH_VENDMASK) |
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(AMD_ID_LV800B & FLASH_TYPEMASK);
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#else
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#error "Unknown flash configured"
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#endif
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flash_info[i].size = FLASH_BANK_SIZE;
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flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
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if (i == 0)
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flashbase = PHYS_FLASH_1;
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else
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panic ("configured too many flash banks!\n");
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for (j = 0; j < flash_info[i].sector_count; j++) {
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if (j <= 3) {
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/* 1st one is 16 KB */
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if (j == 0) {
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flash_info[i].start[j] =
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flashbase + 0;
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}
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/* 2nd and 3rd are both 8 KB */
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if ((j == 1) || (j == 2)) {
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flash_info[i].start[j] =
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flashbase + 0x4000 + (j -
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1) *
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0x2000;
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}
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/* 4th 32 KB */
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if (j == 3) {
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flash_info[i].start[j] =
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flashbase + 0x8000;
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}
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} else {
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flash_info[i].start[j] =
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flashbase + (j - 3) * MAIN_SECT_SIZE;
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}
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}
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size += flash_info[i].size;
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}
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_SYS_FLASH_BASE,
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CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
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&flash_info[0]);
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t * info)
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{
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int i;
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switch (info->flash_id & FLASH_VENDMASK) {
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case (AMD_MANUFACT & FLASH_VENDMASK):
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puts ("AMD: ");
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break;
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default:
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puts ("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case (AMD_ID_LV400B & FLASH_TYPEMASK):
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puts ("1x Amd29LV400BB (4Mbit)\n");
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break;
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case (AMD_ID_LV800B & FLASH_TYPEMASK):
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puts ("1x Amd29LV800BB (8Mbit)\n");
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break;
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default:
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puts ("Unknown Chip Type\n");
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goto Done;
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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puts (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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if ((i % 5) == 0) {
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puts ("\n ");
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}
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printf (" %08lX%s", info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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puts ("\n");
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Done: ;
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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ushort result;
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int iflag, cflag, prot, sect;
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int rc = ERR_OK;
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int chip;
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/* first look for protection bits */
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if (info->flash_id == FLASH_UNKNOWN)
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return ERR_UNKNOWN_FLASH_TYPE;
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if ((s_first < 0) || (s_first > s_last)) {
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return ERR_INVAL;
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}
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if ((info->flash_id & FLASH_VENDMASK) !=
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(AMD_MANUFACT & FLASH_VENDMASK)) {
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return ERR_UNKNOWN_FLASH_VENDOR;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot)
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return ERR_PROTECTED;
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/*
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* Disable interrupts which might cause a timeout
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* here. Remember that our exception vectors are
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* at address 0 in the flash, and we don't want a
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* (ticker) exception to happen while the flash
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* chip is in programming mode.
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*/
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cflag = icache_status ();
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icache_disable ();
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iflag = disable_interrupts ();
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
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printf ("Erasing sector %2d ... ", sect);
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/* arm simple, non interrupt dependent timer */
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reset_timer_masked ();
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if (info->protect[sect] == 0) { /* not protected */
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vu_short *addr = (vu_short *) (info->start[sect]);
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MEM_FLASH_ADDR1 = CMD_UNLOCK1;
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MEM_FLASH_ADDR2 = CMD_UNLOCK2;
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MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
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MEM_FLASH_ADDR1 = CMD_UNLOCK1;
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MEM_FLASH_ADDR2 = CMD_UNLOCK2;
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*addr = CMD_ERASE_CONFIRM;
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/* wait until flash is ready */
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chip = 0;
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do {
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result = *addr;
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/* check timeout */
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if (get_timer_masked () >
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CONFIG_SYS_FLASH_ERASE_TOUT) {
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MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
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chip = TMO;
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break;
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}
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if (!chip
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&& (result & 0xFFFF) & BIT_ERASE_DONE)
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chip = READY;
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if (!chip
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&& (result & 0xFFFF) & BIT_PROGRAM_ERROR)
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chip = ERR;
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} while (!chip);
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MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
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if (chip == ERR) {
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rc = ERR_PROG_ERROR;
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goto outahere;
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}
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if (chip == TMO) {
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rc = ERR_TIMOUT;
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goto outahere;
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}
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puts ("ok.\n");
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} else { /* it was protected */
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puts ("protected!\n");
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}
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}
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if (ctrlc ())
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puts ("User Interrupt!\n");
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outahere:
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/* allow flash to settle - wait 10 ms */
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udelay_masked (10000);
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if (iflag)
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enable_interrupts ();
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if (cflag)
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icache_enable ();
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return rc;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash
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*/
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static int write_hword (flash_info_t * info, ulong dest, ushort data)
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{
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vu_short *addr = (vu_short *) dest;
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ushort result;
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int rc = ERR_OK;
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int cflag, iflag;
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int chip;
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/*
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* Check if Flash is (sufficiently) erased
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*/
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result = *addr;
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if ((result & data) != data)
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return ERR_NOT_ERASED;
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/*
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* Disable interrupts which might cause a timeout
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* here. Remember that our exception vectors are
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* at address 0 in the flash, and we don't want a
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* (ticker) exception to happen while the flash
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* chip is in programming mode.
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*/
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cflag = icache_status ();
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icache_disable ();
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iflag = disable_interrupts ();
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MEM_FLASH_ADDR1 = CMD_UNLOCK1;
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MEM_FLASH_ADDR2 = CMD_UNLOCK2;
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MEM_FLASH_ADDR1 = CMD_PROGRAM;
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*addr = data;
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/* arm simple, non interrupt dependent timer */
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reset_timer_masked ();
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/* wait until flash is ready */
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chip = 0;
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do {
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result = *addr;
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/* check timeout */
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if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
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chip = ERR | TMO;
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break;
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}
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if (!chip && ((result & 0x80) == (data & 0x80)))
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chip = READY;
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if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
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result = *addr;
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if ((result & 0x80) == (data & 0x80))
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chip = READY;
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else
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chip = ERR;
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}
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} while (!chip);
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*addr = CMD_READ_ARRAY;
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if (chip == ERR || *addr != data)
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rc = ERR_PROG_ERROR;
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if (iflag)
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enable_interrupts ();
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if (cflag)
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icache_enable ();
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return rc;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash.
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*/
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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{
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ulong cp, wp;
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int l;
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int i, rc;
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ushort data;
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wp = (addr & ~1); /* get lower word aligned address */
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/*
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* handle unaligned start bytes
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*/
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if ((l = addr - wp) != 0) {
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data = 0;
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for (i = 0, cp = wp; i < l; ++i, ++cp) {
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data = (data >> 8) | (*(uchar *) cp << 8);
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}
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for (; i < 2 && cnt > 0; ++i) {
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data = (data >> 8) | (*src++ << 8);
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--cnt;
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++cp;
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}
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for (; cnt == 0 && i < 2; ++i, ++cp) {
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data = (data >> 8) | (*(uchar *) cp << 8);
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}
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if ((rc = write_hword (info, wp, data)) != 0) {
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return (rc);
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}
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wp += 2;
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}
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/*
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* handle word aligned part
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*/
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while (cnt >= 2) {
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data = *((vu_short *) src);
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if ((rc = write_hword (info, wp, data)) != 0) {
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return (rc);
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}
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src += 2;
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wp += 2;
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cnt -= 2;
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}
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if (cnt == 0) {
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return ERR_OK;
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}
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/*
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* handle unaligned tail bytes
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*/
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data = 0;
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for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
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data = (data >> 8) | (*src++ << 8);
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--cnt;
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}
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for (; i < 2; ++i, ++cp) {
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data = (data >> 8) | (*(uchar *) cp << 8);
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}
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return write_hword (info, wp, data);
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}
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@ -360,3 +360,15 @@ int board_eth_init(bd_t *bis)
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return rc;
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}
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#endif
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/*
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* Hardcoded flash setup:
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* Flash 0 is a non-CFI AMD AM29F400BB flash.
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*/
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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info->portwidth = FLASH_CFI_16BIT;
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info->chipwidth = FLASH_CFI_BY16;
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info->interface = FLASH_CFI_X16;
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return 1;
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}
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|
@ -105,6 +105,7 @@
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/*#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)*/
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* BUNZIP2 needs a lot of RAM */
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/*
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@ -211,32 +212,21 @@
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#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
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#if 0
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#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
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#endif
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_CFI_LEGACY
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#define CONFIG_SYS_FLASH_LEGACY_512Kx16
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#ifdef CONFIG_AMD_LV800
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#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
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#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
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#endif
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#ifdef CONFIG_AMD_LV400
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#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
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#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
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#endif
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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#define CONFIG_SYS_MAX_FLASH_SECT (19)
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#if 0
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#define CONFIG_ENV_IS_IN_FLASH 1
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|
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Reference in New Issue
Block a user