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net: add MMIO Register MDIO MUX driver
Add support for MMIO register MDIO muxes based on the Linux mdio-mux-mmioreg driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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@ -790,4 +790,11 @@ config FSL_LS_MDIO
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This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and
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on the mEMAC (which supports both Clauses 22 and 45).
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config MDIO_MUX_MMIOREG
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bool "MDIO MUX accessed as a MMIO register access"
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depends on DM_MDIO_MUX
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help
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This driver is used for MDIO muxes driven by writing to a register in
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the MMIO physical memory.
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endif # NETDEVICES
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@ -43,6 +43,7 @@ obj-$(CONFIG_MACB) += macb.o
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obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
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obj-$(CONFIG_MDIO_IPQ4019) += mdio-ipq4019.o
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obj-$(CONFIG_MDIO_MUX_I2CREG) += mdio_mux_i2creg.o
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obj-$(CONFIG_MDIO_MUX_MMIOREG) += mdio_mux_mmioreg.o
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obj-$(CONFIG_MDIO_MUX_SANDBOX) += mdio_mux_sandbox.o
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obj-$(CONFIG_MPC8XX_FEC) += mpc8xx_fec.o
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obj-$(CONFIG_MT7620_ETH) += mt7620-eth.o
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129
drivers/net/mdio_mux_mmioreg.c
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129
drivers/net/mdio_mux_mmioreg.c
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@ -0,0 +1,129 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* (C) Copyright 2021 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Based on linux/drivers/net/phy/mdio-mux-mmioreg.c :
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* Copyright 2012 Freescale Semiconductor, Inc.
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*/
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <miiphy.h>
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#include <linux/io.h>
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struct mdio_mux_mmioreg_priv {
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struct udevice *chip;
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phys_addr_t phys;
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unsigned int iosize;
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unsigned int mask;
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};
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static int mdio_mux_mmioreg_select(struct udevice *mux, int cur, int sel)
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{
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struct mdio_mux_mmioreg_priv *priv = dev_get_priv(mux);
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debug("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel);
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/* if last selection didn't change we're good to go */
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if (cur == sel)
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return 0;
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switch (priv->iosize) {
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case sizeof(u8): {
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u8 x, y;
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x = ioread8((void *)priv->phys);
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y = (x & ~priv->mask) | (u32)sel;
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if (x != y) {
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iowrite8((x & ~priv->mask) | sel, (void *)priv->phys);
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debug("%s: %02x -> %02x\n", __func__, x, y);
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}
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break;
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}
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case sizeof(u16): {
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u16 x, y;
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x = ioread16((void *)priv->phys);
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y = (x & ~priv->mask) | (u32)sel;
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if (x != y) {
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iowrite16((x & ~priv->mask) | sel, (void *)priv->phys);
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debug("%s: %04x -> %04x\n", __func__, x, y);
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}
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break;
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}
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case sizeof(u32): {
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u32 x, y;
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x = ioread32((void *)priv->phys);
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y = (x & ~priv->mask) | (u32)sel;
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if (x != y) {
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iowrite32((x & ~priv->mask) | sel, (void *)priv->phys);
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debug("%s: %08x -> %08x\n", __func__, x, y);
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}
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break;
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}
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}
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return 0;
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}
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static const struct mdio_mux_ops mdio_mux_mmioreg_ops = {
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.select = mdio_mux_mmioreg_select,
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};
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static int mdio_mux_mmioreg_probe(struct udevice *dev)
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{
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struct mdio_mux_mmioreg_priv *priv = dev_get_priv(dev);
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phys_addr_t reg_base, reg_size;
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u32 reg_mask;
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int err;
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reg_base = ofnode_get_addr_size_index(dev_ofnode(dev), 0, ®_size);
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if (reg_base == FDT_ADDR_T_NONE)
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return -EINVAL;
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if (reg_size != sizeof(u8) &&
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reg_size != sizeof(u16) &&
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reg_size != sizeof(u32)) {
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printf("%s: only 8/16/32-bit registers are supported\n", __func__);
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return -EINVAL;
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}
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err = dev_read_u32(dev, "mux-mask", ®_mask);
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if (err) {
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debug("%s: error reading mux-mask property\n", __func__);
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return err;
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}
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if (reg_mask >= BIT(reg_size * 8)) {
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printf("%s: mask doesn't fix in register width\n", __func__);
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return -EINVAL;
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}
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priv->phys = reg_base;
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priv->iosize = reg_size;
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priv->mask = reg_mask;
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debug("%s: %llx@%lld / %x\n", __func__, reg_base, reg_size, reg_mask);
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return 0;
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}
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static const struct udevice_id mdio_mux_mmioreg_ids[] = {
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{ .compatible = "mdio-mux-mmioreg" },
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{ }
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};
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U_BOOT_DRIVER(mdio_mux_mmioreg) = {
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.name = "mdio_mux_mmioreg",
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.id = UCLASS_MDIO_MUX,
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.of_match = mdio_mux_mmioreg_ids,
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.probe = mdio_mux_mmioreg_probe,
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.ops = &mdio_mux_mmioreg_ops,
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.priv_auto = sizeof(struct mdio_mux_mmioreg_priv),
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};
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