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https://github.com/brain-hackers/u-boot-brain
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iMX28: Add GPIO control
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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@ -31,6 +31,7 @@
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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@ -134,6 +135,11 @@ int arch_cpu_init(void)
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udelay(1000);
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udelay(1000);
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/*
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* Configure GPIO unit
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*/
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mxs_gpio_init();
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return 0;
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return 0;
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}
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}
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#endif
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#endif
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32
arch/arm/include/asm/arch-mx28/gpio.h
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32
arch/arm/include/asm/arch-mx28/gpio.h
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@ -0,0 +1,32 @@
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/*
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* Freescale i.MX28 GPIO
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __MX28_GPIO_H__
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#define __MX28_GPIO_H__
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#ifdef CONFIG_MXS_GPIO
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void mxs_gpio_init(void);
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#else
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inline void mxs_gpio_init(void) {}
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#endif
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#endif /* __MX28_GPIO_H__ */
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@ -30,6 +30,7 @@ COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
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COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
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COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
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COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o
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COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o
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COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o
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COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o
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COBJS-$(CONFIG_MXS_GPIO) += mxs_gpio.o
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COBJS-$(CONFIG_PCA953X) += pca953x.o
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COBJS-$(CONFIG_PCA953X) += pca953x.o
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COBJS-$(CONFIG_PCA9698) += pca9698.o
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COBJS-$(CONFIG_PCA9698) += pca9698.o
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COBJS-$(CONFIG_S5P) += s5p_gpio.o
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COBJS-$(CONFIG_S5P) += s5p_gpio.o
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136
drivers/gpio/mxs_gpio.c
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136
drivers/gpio/mxs_gpio.c
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@ -0,0 +1,136 @@
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/*
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* Freescale i.MX28 GPIO control code
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#if defined(CONFIG_MX23)
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#define PINCTRL_BANKS 3
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#define PINCTRL_DOUT(n) (0x0500 + ((n) * 0x10))
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#define PINCTRL_DIN(n) (0x0600 + ((n) * 0x10))
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#define PINCTRL_DOE(n) (0x0700 + ((n) * 0x10))
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#define PINCTRL_PIN2IRQ(n) (0x0800 + ((n) * 0x10))
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#define PINCTRL_IRQEN(n) (0x0900 + ((n) * 0x10))
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#define PINCTRL_IRQSTAT(n) (0x0c00 + ((n) * 0x10))
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#elif defined(CONFIG_MX28)
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#define PINCTRL_BANKS 5
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#define PINCTRL_DOUT(n) (0x0700 + ((n) * 0x10))
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#define PINCTRL_DIN(n) (0x0900 + ((n) * 0x10))
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#define PINCTRL_DOE(n) (0x0b00 + ((n) * 0x10))
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#define PINCTRL_PIN2IRQ(n) (0x1000 + ((n) * 0x10))
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#define PINCTRL_IRQEN(n) (0x1100 + ((n) * 0x10))
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#define PINCTRL_IRQSTAT(n) (0x1400 + ((n) * 0x10))
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#else
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#error "Please select CONFIG_MX23 or CONFIG_MX28"
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#endif
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#define GPIO_INT_FALL_EDGE 0x0
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#define GPIO_INT_LOW_LEV 0x1
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#define GPIO_INT_RISE_EDGE 0x2
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#define GPIO_INT_HIGH_LEV 0x3
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#define GPIO_INT_LEV_MASK (1 << 0)
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#define GPIO_INT_POL_MASK (1 << 1)
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void mxs_gpio_init(void)
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{
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int i;
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for (i = 0; i < PINCTRL_BANKS; i++) {
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writel(0, MXS_PINCTRL_BASE + PINCTRL_PIN2IRQ(i));
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writel(0, MXS_PINCTRL_BASE + PINCTRL_IRQEN(i));
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/* Use SCT address here to clear the IRQSTAT bits */
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writel(0xffffffff, MXS_PINCTRL_BASE + PINCTRL_IRQSTAT(i) + 8);
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}
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}
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int gpio_get_value(int gp)
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{
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uint32_t bank = PAD_BANK(gp);
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uint32_t offset = PINCTRL_DIN(bank);
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struct mx28_register *reg =
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(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
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return (readl(®->reg) >> PAD_PIN(gp)) & 1;
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}
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void gpio_set_value(int gp, int value)
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{
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uint32_t bank = PAD_BANK(gp);
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uint32_t offset = PINCTRL_DOUT(bank);
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struct mx28_register *reg =
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(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
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if (value)
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writel(1 << PAD_PIN(gp), ®->reg_set);
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else
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writel(1 << PAD_PIN(gp), ®->reg_clr);
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}
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int gpio_direction_input(int gp)
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{
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uint32_t bank = PAD_BANK(gp);
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uint32_t offset = PINCTRL_DOE(bank);
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struct mx28_register *reg =
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(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
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writel(1 << PAD_PIN(gp), ®->reg_clr);
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return 0;
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}
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int gpio_direction_output(int gp, int value)
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{
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uint32_t bank = PAD_BANK(gp);
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uint32_t offset = PINCTRL_DOE(bank);
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struct mx28_register *reg =
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(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
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writel(1 << PAD_PIN(gp), ®->reg_set);
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gpio_set_value(gp, value);
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return 0;
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}
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int gpio_request(int gp, const char *label)
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{
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if (PAD_BANK(gp) > PINCTRL_BANKS)
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return -EINVAL;
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return 0;
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}
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void gpio_free(int gp)
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{
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}
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void gpio_toggle_value(int gp)
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{
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gpio_set_value(gp, !gpio_get_value(gp));
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}
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