mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 18:56:15 +09:00
rockchip: rk322x: use common TPL board file
Use Common tpl.c instead of rk322x-board-tpl.c Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
parent
18f85080eb
commit
6ae28a30e9
|
@ -59,6 +59,7 @@ config ROCKCHIP_RK322X
|
||||||
select SPL_DRIVERS_MISC_SUPPORT
|
select SPL_DRIVERS_MISC_SUPPORT
|
||||||
imply SPL_SERIAL_SUPPORT
|
imply SPL_SERIAL_SUPPORT
|
||||||
imply TPL_SERIAL_SUPPORT
|
imply TPL_SERIAL_SUPPORT
|
||||||
|
imply TPL_ROCKCHIP_COMMON_BOARD
|
||||||
select ROCKCHIP_BROM_HELPER
|
select ROCKCHIP_BROM_HELPER
|
||||||
select TPL_LIBCOMMON_SUPPORT
|
select TPL_LIBCOMMON_SUPPORT
|
||||||
select TPL_LIBGENERIC_SUPPORT
|
select TPL_LIBGENERIC_SUPPORT
|
||||||
|
|
|
@ -12,7 +12,6 @@ obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o
|
||||||
|
|
||||||
obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
|
obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
|
||||||
obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
|
obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
|
||||||
obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
|
|
||||||
obj-tpl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-tpl.o
|
obj-tpl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-tpl.o
|
||||||
|
|
||||||
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
|
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
|
||||||
|
|
|
@ -1,80 +0,0 @@
|
||||||
// SPDX-License-Identifier: GPL-2.0+
|
|
||||||
/*
|
|
||||||
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <debug_uart.h>
|
|
||||||
#include <dm.h>
|
|
||||||
#include <ram.h>
|
|
||||||
#include <spl.h>
|
|
||||||
#include <asm/io.h>
|
|
||||||
#include <asm/arch-rockchip/bootrom.h>
|
|
||||||
|
|
||||||
u32 spl_boot_device(void)
|
|
||||||
{
|
|
||||||
return BOOT_DEVICE_MMC1;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define TIMER_LOAD_COUNT_L 0x00
|
|
||||||
#define TIMER_LOAD_COUNT_H 0x04
|
|
||||||
#define TIMER_CONTROL_REG 0x10
|
|
||||||
#define TIMER_EN 0x1
|
|
||||||
#define TIMER_FMODE BIT(0)
|
|
||||||
#define TIMER_RMODE BIT(1)
|
|
||||||
|
|
||||||
void rockchip_stimer_init(void)
|
|
||||||
{
|
|
||||||
/* If Timer already enabled, don't re-init it */
|
|
||||||
u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
|
|
||||||
|
|
||||||
if (reg & TIMER_EN)
|
|
||||||
return;
|
|
||||||
|
|
||||||
asm volatile("mcr p15, 0, %0, c14, c0, 0"
|
|
||||||
: : "r"(COUNTER_FREQUENCY));
|
|
||||||
|
|
||||||
writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
|
|
||||||
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
|
|
||||||
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
|
|
||||||
writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
|
|
||||||
TIMER_CONTROL_REG);
|
|
||||||
}
|
|
||||||
|
|
||||||
void board_init_f(ulong dummy)
|
|
||||||
{
|
|
||||||
struct udevice *dev;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Debug UART can be used from here if required:
|
|
||||||
*
|
|
||||||
* debug_uart_init();
|
|
||||||
* printch('a');
|
|
||||||
* printhex8(0x1234);
|
|
||||||
* printascii("string");
|
|
||||||
*/
|
|
||||||
debug_uart_init();
|
|
||||||
printascii("TPL Init");
|
|
||||||
|
|
||||||
ret = spl_early_init();
|
|
||||||
if (ret) {
|
|
||||||
debug("spl_early_init() failed: %d\n", ret);
|
|
||||||
hang();
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Init secure timer */
|
|
||||||
rockchip_stimer_init();
|
|
||||||
/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
|
|
||||||
timer_init();
|
|
||||||
|
|
||||||
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
|
|
||||||
if (ret) {
|
|
||||||
printf("DRAM init failed: %d\n", ret);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
|
|
||||||
back_to_bootrom(BROM_BOOT_NEXTSTAGE);
|
|
||||||
#endif
|
|
||||||
}
|
|
Loading…
Reference in New Issue
Block a user