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crypto/fsl: Correct 64-bit write when MMU disabled
When MMU is disabled, 64-bit write must be aligned at 64-bit boundary. Becaue the memory location is not guaranteed to be 64-bit aligned, the 64-bit write needs to be split into two 32-bit writes to avoid the alignment exception. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -112,10 +112,9 @@ static inline void append_ptr(u32 *desc, dma_addr_t ptr)
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#ifdef CONFIG_PHYS_64BIT
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#ifdef CONFIG_PHYS_64BIT
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/* The Position of low and high part of 64 bit address
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/* The Position of low and high part of 64 bit address
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* will depend on the endianness of CAAM Block */
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* will depend on the endianness of CAAM Block */
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union ptr_addr_t ptr_addr;
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union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset;
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ptr_addr.m_halfs.high = (u32)(ptr >> 32);
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ptr_addr->m_halfs.high = (u32)(ptr >> 32);
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ptr_addr.m_halfs.low = (u32)ptr;
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ptr_addr->m_halfs.low = (u32)ptr;
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*offset = ptr_addr.m_whole;
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#else
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#else
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*offset = ptr;
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*offset = ptr;
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#endif
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#endif
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