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ARC: HSDK-4xD: add CSM configuration support
Add support for CSM enable/disable and CSM relocation via hsdk_init command. We allow to relocate CSM to the beginning of any aperture even if HW support finer granularity. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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@ -51,6 +51,9 @@
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#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */
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#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */
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#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */
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#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */
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/* CSM auxiliary registers */
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#define ARC_AUX_CSM_ENABLE 0x9A0
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/* Timer related auxiliary registers */
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/* Timer related auxiliary registers */
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#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
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#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
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#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
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#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
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@ -80,6 +80,7 @@ struct hsdk_env_common_ctl {
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u32_env nvlim;
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u32_env nvlim;
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u32_env icache;
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u32_env icache;
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u32_env dcache;
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u32_env dcache;
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u32_env csm_location;
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u32_env l2_cache;
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u32_env l2_cache;
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};
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};
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@ -132,6 +133,7 @@ static const struct env_map_common env_map_common[] = {
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{ "dcache_ena", ENV_HEX, true, 0, 1, &env_common.dcache },
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{ "dcache_ena", ENV_HEX, true, 0, 1, &env_common.dcache },
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#if defined(CONFIG_BOARD_HSDK_4XD)
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#if defined(CONFIG_BOARD_HSDK_4XD)
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{ "l2_cache_ena", ENV_HEX, true, 0, 1, &env_common.l2_cache },
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{ "l2_cache_ena", ENV_HEX, true, 0, 1, &env_common.l2_cache },
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{ "csm_location", ENV_HEX, true, 0, NO_CCM, &env_common.csm_location },
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#endif /* CONFIG_BOARD_HSDK_4XD */
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#endif /* CONFIG_BOARD_HSDK_4XD */
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{}
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{}
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};
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};
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@ -299,6 +301,30 @@ static void init_cluster_slc(void)
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slc_disable();
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slc_disable();
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}
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}
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#define CREG_CSM_BASE (CREG_BASE + 0x210)
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static void init_cluster_csm(void)
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{
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/* ARC HS38 in HSDK SoC doesn't include CSM */
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if (!is_board_match_config(T_BOARD_HSDK_4XD))
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return;
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if (env_common.csm_location.val == NO_CCM) {
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write_aux_reg(ARC_AUX_CSM_ENABLE, 0);
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} else {
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/*
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* CSM base address is 256kByte aligned but we allow to map
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* CSM only to aperture start (256MByte aligned)
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* The field in CREG_CSM_BASE is in 17:2 bits itself so we need
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* to shift it.
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*/
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u32 csm_base = (env_common.csm_location.val * SZ_1K) << 2;
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write_aux_reg(ARC_AUX_CSM_ENABLE, 1);
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writel(csm_base, (void __iomem *)CREG_CSM_BASE);
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}
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}
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static void init_master_icache(void)
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static void init_master_icache(void)
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{
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{
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if (icache_status()) {
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if (icache_status()) {
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@ -678,6 +704,7 @@ static void do_init_cluster(void)
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* cores.
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* cores.
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*/
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*/
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init_cluster_nvlim();
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init_cluster_nvlim();
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init_cluster_csm();
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init_cluster_slc();
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init_cluster_slc();
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}
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}
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