mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-28 15:40:29 +09:00
Merge pull request #12 from Sgch/old-2nd-gen
add limited support for 2nd generation LCD
This commit is contained in:
commit
68ef068c7d
@ -49,10 +49,15 @@ void mxsfb_system_setup(void)
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struct mxs_clkctrl_regs *xtal =
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struct mxs_clkctrl_regs *xtal =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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struct mxs_pwm_regs *pwm = (struct mxs_pwm_regs *)MXS_PWM_BASE;
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struct mxs_pwm_regs *pwm = (struct mxs_pwm_regs *)MXS_PWM_BASE;
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#ifdef CONFIG_BRAIN_3G_4G
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int i, j;
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int i, j;
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uint8_t ili9805_mac = 0;
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#else
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int i;
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#endif
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uint32_t valid_data;
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uint32_t valid_data;
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uint8_t ili9805_mac = 0;
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lcd_config_t config = get_lcd_config();
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lcd_config_t config = get_lcd_config();
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valid_data = readl(&lcdif->hw_lcdif_ctrl1) &
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valid_data = readl(&lcdif->hw_lcdif_ctrl1) &
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@ -79,12 +84,23 @@ void mxsfb_system_setup(void)
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gpio_direction_output(MX28_PAD_ENET_CLK__GPIO_4_16, 1);
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gpio_direction_output(MX28_PAD_ENET_CLK__GPIO_4_16, 1);
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mdelay(20);
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mdelay(20);
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#ifdef CONFIG_BRAIN_2G
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/* Reset LCD Controller */
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writel(LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1_set);
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mdelay(30);
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writel(LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1_clr);
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mdelay(30);
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writel(LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1_set);
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mdelay(30);
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#endif
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for (i = 0; i < ARRAY_SIZE(regs_early); i++) {
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for (i = 0; i < ARRAY_SIZE(regs_early); i++) {
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mxsfb_write_byte(regs_early[i].payload, regs_early[i].data);
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mxsfb_write_byte(regs_early[i].payload, regs_early[i].data);
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if (regs_early[i].delay)
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if (regs_early[i].delay)
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mdelay(regs_early[i].delay);
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mdelay(regs_early[i].delay);
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}
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}
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#ifdef CONFIG_BRAIN_3G_4G
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if (config.flip_x) {
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if (config.flip_x) {
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ili9805_mac |= 1 << ILI9805_MAC_MX_OFFSET;
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ili9805_mac |= 1 << ILI9805_MAC_MX_OFFSET;
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}
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}
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@ -111,10 +127,16 @@ void mxsfb_system_setup(void)
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if (config.inversion) {
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if (config.inversion) {
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mxsfb_write_byte(0x21, 0); /* Display Inversion On */
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mxsfb_write_byte(0x21, 0); /* Display Inversion On */
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}
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}
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#endif
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mxsfb_write_byte(0x11, 0); /* Sleep Out */
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mxsfb_write_byte(0x11, 0); /* Sleep Out */
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mdelay(120);
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mdelay(120);
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#ifdef CONFIG_BRAIN_2G
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mxsfb_write_byte(0x34, 0);
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mdelay(30);
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#endif
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mxsfb_write_byte(0x29, 0); /* Display On */
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mxsfb_write_byte(0x29, 0); /* Display On */
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mdelay(20);
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mdelay(20);
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@ -123,27 +145,43 @@ void mxsfb_system_setup(void)
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mxsfb_write_byte(0x00, 1); /* Start Column in 2 Bytes */
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mxsfb_write_byte(0x00, 1); /* Start Column in 2 Bytes */
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mxsfb_write_byte(0x00, 1);
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mxsfb_write_byte(0x00, 1);
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#ifdef CONFIG_BRAIN_3G_4G
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mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
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mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
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mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
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mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
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#else
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mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
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mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
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#endif
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mxsfb_write_byte(0x2b, 0); /* Page Address Set */
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mxsfb_write_byte(0x2b, 0); /* Page Address Set */
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mxsfb_write_byte(0x00, 1); /* Start Page in 2 Bytes */
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mxsfb_write_byte(0x00, 1); /* Start Page in 2 Bytes */
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mxsfb_write_byte(0x00, 1);
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mxsfb_write_byte(0x00, 1);
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#ifdef CONFIG_BRAIN_3G_4G
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mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
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mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
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mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
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mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
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#else
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mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
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mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
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#endif
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mxsfb_write_byte(0x2c, 0); /* Memory Write */
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mxsfb_write_byte(0x2c, 0); /* Memory Write */
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#ifdef CONFIG_BRAIN_3G_4G
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/* Fill black */
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/* Fill black */
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for (i = 0; i < config.height; i++) {
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for (i = 0; i < config.height; i++) {
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for (j = 0; j < config.width; j++) {
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for (j = 0; j < config.width; j++) {
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mxsfb_write_byte(0, 1);
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mxsfb_write_byte(0, 1);
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}
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}
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}
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}
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#endif
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#ifdef CONFIG_BRAIN_3G_4G
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writel(valid_data, &lcdif->hw_lcdif_ctrl1);
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writel(valid_data, &lcdif->hw_lcdif_ctrl1);
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#else
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writel(valid_data | LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1);
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#endif
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writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DATA_SELECT,
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writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DATA_SELECT,
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&lcdif->hw_lcdif_ctrl_set);
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&lcdif->hw_lcdif_ctrl_set);
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@ -35,7 +35,7 @@ typedef struct {
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} lcd_regs_t;
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} lcd_regs_t;
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/* clang-format off */
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/* clang-format off */
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#ifdef CONFIG_BRAIN_3G_4G
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const static lcd_regs_t regs_early[] = {
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const static lcd_regs_t regs_early[] = {
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{ 0xff, 0, 0 }, /* EXTC Command Set Enable */
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{ 0xff, 0, 0 }, /* EXTC Command Set Enable */
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{ 0xff, 1, 0 }, { 0x98, 1, 0 }, { 0x05, 1, 0 },
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{ 0xff, 1, 0 }, { 0x98, 1, 0 }, { 0x05, 1, 0 },
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@ -85,7 +85,75 @@ const static lcd_regs_t regs_early[] = {
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{ 0x35, 0, 0 }, /* Tearing Effect Line On */
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{ 0x35, 0, 0 }, /* Tearing Effect Line On */
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{ 0x00, 1, 0 },
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{ 0x00, 1, 0 },
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};
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};
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#else
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const static lcd_regs_t regs_early[] = {
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{ 0x3a, 0, 0 },
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{ 0x55, 1, 0 },
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{ 0xb2, 0, 0 },
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{ 0x45, 1, 0 }, { 0x00, 1, 0 }, { 0xd9, 1, 0 }, { 0x00, 1, 0 },
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{ 0x00, 1, 0 },
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{ 0xb3, 0, 0 },
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{ 0x81, 1, 0 }, { 0x00, 1, 0 }, { 0x01, 1, 0 },
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{ 0xb4, 0, 0 },
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{ 0x00, 1, 0 },
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{ 0xb5, 0, 0 },
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{ 0x02, 1, 0 }, { 0x11, 1, 0 }, { 0x50, 1, 0 }, { 0x00, 1, 0 },
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{ 0x80, 1, 0 }, { 0x45, 1, 0 }, { 0x45, 1, 0 }, { 0x00, 1, 0 },
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{ 0xb6, 0, 0 },
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{ 0x1e, 1, 0 }, { 0x01, 1, 0 }, { 0x90, 1, 0 }, { 0x0a, 1, 0 },
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{ 0x02, 1, 0 }, { 0x58, 1, 0 },
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{ 0xb7, 0, 0 },
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{ 0x2a, 1, 0 }, { 0x91, 1, 0 }, { 0x5c, 1, 0 }, { 0x06, 1, 0 },
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{ 0x08, 1, 0 }, { 0x0c, 1, 0 }, { 0x00, 1, 0 }, { 0x1c, 1, 0 },
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{ 0x06, 1, 0 }, { 0x02, 1, 0 }, { 0x09, 1, 0 },
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{ 0xb9, 0, 0 },
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{ 0x00, 1, 0 }, { 0x32, 1, 0 }, { 0x01, 1, 0 }, { 0x40, 1, 0 },
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{ 0x00, 1, 0 },
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{ 0xc0, 0, 0 },
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{ 0xb7, 1, 0 }, { 0x03, 1, 0 },
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{ 0xc1, 0, 0 },
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{ 0x72, 1, 0 }, { 0x01, 1, 0 },
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{ 0xc2, 0, 0 },
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{ 0x37, 1, 0 }, { 0x2f, 1, 0 }, { 0x0c, 1, 0 },
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{ 0xc3, 0, 0 },
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{ 0x37, 1, 0 }, { 0x03, 1, 0 },
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{ 0xc7, 0, 0 },
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{ 0x01, 1, 0 }, { 0x33, 1, 0 }, { 0x03, 1, 0 },
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{ 0xca, 0, 0 },
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{ 0xbd, 1, 0 }, { 0x17, 1, 0 }, { 0x5b, 1, 0 }, { 0x5b, 1, 0 },
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{ 0x64, 1, 0 }, { 0x11, 1, 0 }, { 0x66, 1, 0 },
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{ 0xde, 0, 0 },
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{ 0x11, 1, 0 }, { 0x00, 1, 0 },
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{ 0xe0, 0, 0 },
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{ 0x24, 1, 0 }, { 0x3f, 1, 0 }, { 0x0e, 1, 0 }, { 0x0e, 1, 0 },
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{ 0x67, 1, 0 }, { 0xee, 1, 0 }, { 0xee, 1, 0 }, { 0xa3, 1, 0 },
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{ 0x04, 1, 0 },
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{ 0xe1, 0, 0 },
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{ 0x24, 1, 0 }, { 0x3f, 1, 0 }, { 0x0f, 1, 0 }, { 0x0e, 1, 0 },
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{ 0x78, 1, 0 }, { 0xee, 1, 0 }, { 0xed, 1, 0 }, { 0x93, 1, 0 },
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{ 0x04, 1, 0 },
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{ 0xe2, 0, 0 },
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{ 0x24, 1, 0 }, { 0x29, 1, 0 }, { 0x14, 1, 0 }, { 0x1c, 1, 0 },
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{ 0x67, 1, 0 }, { 0xdd, 1, 0 }, { 0xdd, 1, 0 }, { 0x97, 1, 0 },
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{ 0x0b, 1, 0 },
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{ 0xe3, 0, 0 },
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{ 0x24, 1, 0 }, { 0x29, 1, 0 }, { 0x14, 1, 0 }, { 0x1c, 1, 0 },
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{ 0x67, 1, 0 }, { 0xdd, 1, 0 }, { 0xdd, 1, 0 }, { 0x97, 1, 0 },
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{ 0x0a, 1, 0 },
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{ 0xe4, 0, 0 },
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{ 0x24, 1, 0 }, { 0x2a, 1, 0 }, { 0x15, 1, 0 }, { 0x1a, 1, 0 },
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{ 0x99, 1, 0 }, { 0xdd, 1, 0 }, { 0xed, 1, 0 }, { 0xa6, 1, 0 },
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{ 0x09, 1, 0 },
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{ 0xe5, 0, 0 },
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{ 0x24, 1, 0 }, { 0x2a, 1, 0 }, { 0x15, 1, 0 }, { 0x1a, 1, 0 },
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{ 0x88, 1, 0 }, { 0xdd, 1, 0 }, { 0xdd, 1, 0 }, { 0x97, 1, 0 },
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{ 0x0c, 1, 0 },
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{ 0x36, 0, 0 }, /* Memory Acess Control */
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{ 0x28, 1, 0 },
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{ 0x2c, 0, 0 }, /* Display On */
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{ 0x00, 1, 0 },
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};
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#endif
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/* clang-format on */
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/* clang-format on */
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#endif
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#endif
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@ -28,6 +28,8 @@
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#include <netdev.h>
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#include <netdev.h>
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#include <errno.h>
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#include <errno.h>
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#include "../common/lcd.h"
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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/*
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/*
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@ -94,3 +96,15 @@ int board_mmc_init(bd_t *bis)
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return 0;
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return 0;
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}
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}
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#endif
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#endif
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#ifdef CONFIG_VIDEO_MXS
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static const lcd_config_t lcd_config = {
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.width = 480,
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.height = 320,
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};
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lcd_config_t get_lcd_config()
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{
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return lcd_config;
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}
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#endif
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@ -26,4 +26,5 @@ CONFIG_ENV_IS_IN_MMC=y
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# CONFIG_NET is not set
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# CONFIG_NET is not set
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CONFIG_MMC_MXS=y
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CONFIG_MMC_MXS=y
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CONFIG_CONS_INDEX=0
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CONFIG_CONS_INDEX=0
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CONFIG_VIDEO=y
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CONFIG_OF_LIBFDT=y
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CONFIG_OF_LIBFDT=y
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@ -34,6 +34,22 @@
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#endif
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#endif
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/* Framebuffer support */
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_MXS
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#define CONFIG_VIDEO_MXS_MODE_SYSTEM
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_LOGO
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#define CONFIG_HIDE_LOGO_VERSION
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
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#define CONFIG_VIDEO_FONT_6X11
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#define LCD_BPP LCD_COLOR16
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#endif
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/* USB */
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/* USB */
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#ifdef CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_EHCI_MXS_PORT1
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#define CONFIG_EHCI_MXS_PORT1
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@ -48,8 +64,9 @@
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/* Extra Environment */
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/* Extra Environment */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"stdin=serial\0" \
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"stdin=serial\0" \
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"stdout=serial\0" \
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"stdout=serial,vga\0" \
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"stderr=serial\0" \
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"stderr=serial,vga\0" \
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"videomode=video=ctfb:x:480,y:320,depth:16,pclk:160000,le:0,ri:0,up:0,lo:0,hs:0,vs:0,sync:0,vmode:0\0" \
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"bootdelay=0\0" \
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"bootdelay=0\0" \
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"image=zImage\0" \
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"image=zImage\0" \
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"console_mainline=ttyAMA0\0" \
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"console_mainline=ttyAMA0\0" \
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BIN
tools/logos/pwg5300.bmp
Normal file
BIN
tools/logos/pwg5300.bmp
Normal file
Binary file not shown.
After Width: | Height: | Size: 85 KiB |
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