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Merge pull request #12 from Sgch/old-2nd-gen

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add limited support for 2nd generation LCD
This commit is contained in:
Takumi Sueda 2021-03-29 00:23:51 +09:00 committed by GitHub
commit 68ef068c7d
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GPG Key ID: 4AEE18F83AFDEB23
6 changed files with 186 additions and 48 deletions
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126
board/sharp/common/lcd.c
View File

@ -20,15 +20,15 @@ static int mxsfb_write_byte(uint32_t payload, const unsigned int data)
const unsigned int timeout = 0x10000;
if (mxs_wait_mask_clr(&regs->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
timeout))
timeout))
return -ETIMEDOUT;
writel((1 << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) |
(1 << LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET),
&regs->hw_lcdif_transfer_count);
(1 << LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET),
&regs->hw_lcdif_transfer_count);
writel(LCDIF_CTRL_DATA_SELECT | LCDIF_CTRL_RUN,
&regs->hw_lcdif_ctrl_clr);
&regs->hw_lcdif_ctrl_clr);
if (data)
writel(LCDIF_CTRL_DATA_SELECT, &regs->hw_lcdif_ctrl_set);
@ -40,7 +40,7 @@ static int mxsfb_write_byte(uint32_t payload, const unsigned int data)
writel(payload, &regs->hw_lcdif_data);
return mxs_wait_mask_clr(&regs->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
timeout);
timeout);
}
void mxsfb_system_setup(void)
@ -49,29 +49,34 @@ void mxsfb_system_setup(void)
struct mxs_clkctrl_regs *xtal =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
struct mxs_pwm_regs *pwm = (struct mxs_pwm_regs *)MXS_PWM_BASE;
#ifdef CONFIG_BRAIN_3G_4G
int i, j;
uint8_t ili9805_mac = 0;
#else
int i;
#endif
uint32_t valid_data;
uint8_t ili9805_mac = 0;
lcd_config_t config = get_lcd_config();
valid_data = readl(&lcdif->hw_lcdif_ctrl1) &
LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK;
LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK;
writel(0x3 << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET,
&lcdif->hw_lcdif_ctrl1);
&lcdif->hw_lcdif_ctrl1);
/* Switch the LCDIF into System-Mode */
writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DOTCLK_MODE |
LCDIF_CTRL_BYPASS_COUNT,
&lcdif->hw_lcdif_ctrl_clr);
LCDIF_CTRL_BYPASS_COUNT,
&lcdif->hw_lcdif_ctrl_clr);
writel(LCDIF_CTRL_VSYNC_MODE, &lcdif->hw_lcdif_ctrl_set);
writel(LCDIF_VDCTRL3_VSYNC_ONLY, &lcdif->hw_lcdif_vdctrl3_set);
writel((0x01 << LCDIF_TIMING_CMD_HOLD_OFFSET) |
(0x01 << LCDIF_TIMING_CMD_SETUP_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_HOLD_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_SETUP_OFFSET),
&lcdif->hw_lcdif_timing);
(0x01 << LCDIF_TIMING_CMD_SETUP_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_HOLD_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_SETUP_OFFSET),
&lcdif->hw_lcdif_timing);
/* Enable LCD Controller */
gpio_direction_output(MX28_PAD_GPMI_ALE__GPIO_0_26, 1);
@ -79,12 +84,23 @@ void mxsfb_system_setup(void)
gpio_direction_output(MX28_PAD_ENET_CLK__GPIO_4_16, 1);
mdelay(20);
#ifdef CONFIG_BRAIN_2G
/* Reset LCD Controller */
writel(LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1_set);
mdelay(30);
writel(LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1_clr);
mdelay(30);
writel(LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1_set);
mdelay(30);
#endif
for (i = 0; i < ARRAY_SIZE(regs_early); i++) {
mxsfb_write_byte(regs_early[i].payload, regs_early[i].data);
if (regs_early[i].delay)
mdelay(regs_early[i].delay);
}
#ifdef CONFIG_BRAIN_3G_4G
if (config.flip_x) {
ili9805_mac |= 1 << ILI9805_MAC_MX_OFFSET;
}
@ -111,42 +127,64 @@ void mxsfb_system_setup(void)
if (config.inversion) {
mxsfb_write_byte(0x21, 0); /* Display Inversion On */
}
#endif
mxsfb_write_byte(0x11, 0); /* Sleep Out */
mdelay(120);
mxsfb_write_byte(0x11, 0); /* Sleep Out */
mdelay(120);
mxsfb_write_byte(0x29, 0); /* Display On */
mdelay(20);
#ifdef CONFIG_BRAIN_2G
mxsfb_write_byte(0x34, 0);
mdelay(30);
#endif
mxsfb_write_byte(0x2a, 0); /* Column Address Set */
mxsfb_write_byte(0x29, 0); /* Display On */
mdelay(20);
mxsfb_write_byte(0x00, 1); /* Start Column in 2 Bytes */
mxsfb_write_byte(0x00, 1);
mxsfb_write_byte(0x2a, 0); /* Column Address Set */
mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
mxsfb_write_byte(0x00, 1); /* Start Column in 2 Bytes */
mxsfb_write_byte(0x00, 1);
mxsfb_write_byte(0x2b, 0); /* Page Address Set */
#ifdef CONFIG_BRAIN_3G_4G
mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
#else
mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
#endif
mxsfb_write_byte(0x00, 1); /* Start Page in 2 Bytes */
mxsfb_write_byte(0x00, 1);
mxsfb_write_byte(0x2b, 0); /* Page Address Set */
mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
mxsfb_write_byte(0x00, 1); /* Start Page in 2 Bytes */
mxsfb_write_byte(0x00, 1);
mxsfb_write_byte(0x2c, 0); /* Memory Write */
#ifdef CONFIG_BRAIN_3G_4G
mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
#else
mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
#endif
mxsfb_write_byte(0x2c, 0); /* Memory Write */
#ifdef CONFIG_BRAIN_3G_4G
/* Fill black */
for (i = 0; i < config.height; i++) {
for (j = 0; j < config.width; j++) {
mxsfb_write_byte(0, 1);
}
}
#endif
#ifdef CONFIG_BRAIN_3G_4G
writel(valid_data, &lcdif->hw_lcdif_ctrl1);
#else
writel(valid_data | LCDIF_CTRL1_RESET, &lcdif->hw_lcdif_ctrl1);
#endif
writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DATA_SELECT,
&lcdif->hw_lcdif_ctrl_set);
&lcdif->hw_lcdif_ctrl_set);
/* Turn on backlight */
writel(CLKCTRL_XTAL_PWM_CLK24M_GATE, &xtal->hw_clkctrl_xtal_clr);
@ -155,29 +193,29 @@ void mxsfb_system_setup(void)
writel(PWM_CTRL_CLKGATE, &pwm->hw_pwm_ctrl_clr);
writel(PWM_CTRL_PWM0_ENABLE | PWM_CTRL_PWM1_ENABLE,
&pwm->hw_pwm_ctrl_clr);
&pwm->hw_pwm_ctrl_clr);
writel((0x005a << PWM_ACTIVE0_INACTIVE_OFFSET) |
(0x0000 << PWM_ACTIVE0_ACTIVE_OFFSET),
&pwm->hw_pwm_active0_set);
(0x0000 << PWM_ACTIVE0_ACTIVE_OFFSET),
&pwm->hw_pwm_active0_set);
writel((0x00f0 << PWM_ACTIVE1_INACTIVE_OFFSET) |
(0x0000 << PWM_ACTIVE1_ACTIVE_OFFSET),
&pwm->hw_pwm_active1_set);
(0x0000 << PWM_ACTIVE1_ACTIVE_OFFSET),
&pwm->hw_pwm_active1_set);
writel((0x1 << PWM_PERIOD0_CDIV_OFFSET) |
(0x2 << PWM_PERIOD0_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD0_ACTIVE_STATE_OFFSET) |
(0x01f3 << PWM_PERIOD0_PERIOD_OFFSET),
&pwm->hw_pwm_period0_set);
(0x2 << PWM_PERIOD0_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD0_ACTIVE_STATE_OFFSET) |
(0x01f3 << PWM_PERIOD0_PERIOD_OFFSET),
&pwm->hw_pwm_period0_set);
writel((0x0 << PWM_PERIOD1_CDIV_OFFSET) |
(0x3 << PWM_PERIOD1_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD1_ACTIVE_STATE_OFFSET) |
(0x07cf << PWM_PERIOD1_PERIOD_OFFSET),
&pwm->hw_pwm_period1_set);
(0x3 << PWM_PERIOD1_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD1_ACTIVE_STATE_OFFSET) |
(0x07cf << PWM_PERIOD1_PERIOD_OFFSET),
&pwm->hw_pwm_period1_set);
writel(PWM_CTRL_PWM0_ENABLE | PWM_CTRL_PWM1_ENABLE,
&pwm->hw_pwm_ctrl_set);
&pwm->hw_pwm_ctrl_set);
}
#endif

72
board/sharp/common/lcd.h
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@ -35,7 +35,7 @@ typedef struct {
} lcd_regs_t;
/* clang-format off */
#ifdef CONFIG_BRAIN_3G_4G
const static lcd_regs_t regs_early[] = {
{ 0xff, 0, 0 }, /* EXTC Command Set Enable */
{ 0xff, 1, 0 }, { 0x98, 1, 0 }, { 0x05, 1, 0 },
@ -85,7 +85,75 @@ const static lcd_regs_t regs_early[] = {
{ 0x35, 0, 0 }, /* Tearing Effect Line On */
{ 0x00, 1, 0 },
};
#else
const static lcd_regs_t regs_early[] = {
{ 0x3a, 0, 0 },
{ 0x55, 1, 0 },
{ 0xb2, 0, 0 },
{ 0x45, 1, 0 }, { 0x00, 1, 0 }, { 0xd9, 1, 0 }, { 0x00, 1, 0 },
{ 0x00, 1, 0 },
{ 0xb3, 0, 0 },
{ 0x81, 1, 0 }, { 0x00, 1, 0 }, { 0x01, 1, 0 },
{ 0xb4, 0, 0 },
{ 0x00, 1, 0 },
{ 0xb5, 0, 0 },
{ 0x02, 1, 0 }, { 0x11, 1, 0 }, { 0x50, 1, 0 }, { 0x00, 1, 0 },
{ 0x80, 1, 0 }, { 0x45, 1, 0 }, { 0x45, 1, 0 }, { 0x00, 1, 0 },
{ 0xb6, 0, 0 },
{ 0x1e, 1, 0 }, { 0x01, 1, 0 }, { 0x90, 1, 0 }, { 0x0a, 1, 0 },
{ 0x02, 1, 0 }, { 0x58, 1, 0 },
{ 0xb7, 0, 0 },
{ 0x2a, 1, 0 }, { 0x91, 1, 0 }, { 0x5c, 1, 0 }, { 0x06, 1, 0 },
{ 0x08, 1, 0 }, { 0x0c, 1, 0 }, { 0x00, 1, 0 }, { 0x1c, 1, 0 },
{ 0x06, 1, 0 }, { 0x02, 1, 0 }, { 0x09, 1, 0 },
{ 0xb9, 0, 0 },
{ 0x00, 1, 0 }, { 0x32, 1, 0 }, { 0x01, 1, 0 }, { 0x40, 1, 0 },
{ 0x00, 1, 0 },
{ 0xc0, 0, 0 },
{ 0xb7, 1, 0 }, { 0x03, 1, 0 },
{ 0xc1, 0, 0 },
{ 0x72, 1, 0 }, { 0x01, 1, 0 },
{ 0xc2, 0, 0 },
{ 0x37, 1, 0 }, { 0x2f, 1, 0 }, { 0x0c, 1, 0 },
{ 0xc3, 0, 0 },
{ 0x37, 1, 0 }, { 0x03, 1, 0 },
{ 0xc7, 0, 0 },
{ 0x01, 1, 0 }, { 0x33, 1, 0 }, { 0x03, 1, 0 },
{ 0xca, 0, 0 },
{ 0xbd, 1, 0 }, { 0x17, 1, 0 }, { 0x5b, 1, 0 }, { 0x5b, 1, 0 },
{ 0x64, 1, 0 }, { 0x11, 1, 0 }, { 0x66, 1, 0 },
{ 0xde, 0, 0 },
{ 0x11, 1, 0 }, { 0x00, 1, 0 },
{ 0xe0, 0, 0 },
{ 0x24, 1, 0 }, { 0x3f, 1, 0 }, { 0x0e, 1, 0 }, { 0x0e, 1, 0 },
{ 0x67, 1, 0 }, { 0xee, 1, 0 }, { 0xee, 1, 0 }, { 0xa3, 1, 0 },
{ 0x04, 1, 0 },
{ 0xe1, 0, 0 },
{ 0x24, 1, 0 }, { 0x3f, 1, 0 }, { 0x0f, 1, 0 }, { 0x0e, 1, 0 },
{ 0x78, 1, 0 }, { 0xee, 1, 0 }, { 0xed, 1, 0 }, { 0x93, 1, 0 },
{ 0x04, 1, 0 },
{ 0xe2, 0, 0 },
{ 0x24, 1, 0 }, { 0x29, 1, 0 }, { 0x14, 1, 0 }, { 0x1c, 1, 0 },
{ 0x67, 1, 0 }, { 0xdd, 1, 0 }, { 0xdd, 1, 0 }, { 0x97, 1, 0 },
{ 0x0b, 1, 0 },
{ 0xe3, 0, 0 },
{ 0x24, 1, 0 }, { 0x29, 1, 0 }, { 0x14, 1, 0 }, { 0x1c, 1, 0 },
{ 0x67, 1, 0 }, { 0xdd, 1, 0 }, { 0xdd, 1, 0 }, { 0x97, 1, 0 },
{ 0x0a, 1, 0 },
{ 0xe4, 0, 0 },
{ 0x24, 1, 0 }, { 0x2a, 1, 0 }, { 0x15, 1, 0 }, { 0x1a, 1, 0 },
{ 0x99, 1, 0 }, { 0xdd, 1, 0 }, { 0xed, 1, 0 }, { 0xa6, 1, 0 },
{ 0x09, 1, 0 },
{ 0xe5, 0, 0 },
{ 0x24, 1, 0 }, { 0x2a, 1, 0 }, { 0x15, 1, 0 }, { 0x1a, 1, 0 },
{ 0x88, 1, 0 }, { 0xdd, 1, 0 }, { 0xdd, 1, 0 }, { 0x97, 1, 0 },
{ 0x0c, 1, 0 },
{ 0x36, 0, 0 }, /* Memory Acess Control */
{ 0x28, 1, 0 },
{ 0x2c, 0, 0 }, /* Display On */
{ 0x00, 1, 0 },
};
#endif
/* clang-format on */
#endif

14
board/sharp/pwg5300/pwg5300.c
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@ -28,6 +28,8 @@
#include <netdev.h>
#include <errno.h>
#include "../common/lcd.h"
DECLARE_GLOBAL_DATA_PTR;
/*
@ -94,3 +96,15 @@ int board_mmc_init(bd_t *bis)
return 0;
}
#endif
#ifdef CONFIG_VIDEO_MXS
static const lcd_config_t lcd_config = {
.width = 480,
.height = 320,
};
lcd_config_t get_lcd_config()
{
return lcd_config;
}
#endif

1
configs/pwg5300_defconfig
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@ -26,4 +26,5 @@ CONFIG_ENV_IS_IN_MMC=y
# CONFIG_NET is not set
CONFIG_MMC_MXS=y
CONFIG_CONS_INDEX=0
CONFIG_VIDEO=y
CONFIG_OF_LIBFDT=y

21
include/configs/pwg5300.h
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@ -34,6 +34,22 @@
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
/* Framebuffer support */
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_MXS_MODE_SYSTEM
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_HIDE_LOGO_VERSION
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
#define CONFIG_VIDEO_FONT_6X11
#define LCD_BPP LCD_COLOR16
#endif
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_MXS_PORT1
@ -48,8 +64,9 @@
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
"stdin=serial\0" \
"stdout=serial\0" \
"stderr=serial\0" \
"stdout=serial,vga\0" \
"stderr=serial,vga\0" \
"videomode=video=ctfb:x:480,y:320,depth:16,pclk:160000,le:0,ri:0,up:0,lo:0,hs:0,vs:0,sync:0,vmode:0\0" \
"bootdelay=0\0" \
"image=zImage\0" \
"console_mainline=ttyAMA0\0" \

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