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arm: socfpga: spl: Add CONFIG_SPL_MAX_SIZE to be 64KB
The Cyclone5 SoCFPGA has 64KB of OCRAM for SPL use. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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@ -292,6 +292,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
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#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
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#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
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#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024)
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#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024)
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#define CONFIG_SPL_MAX_SIZE (64 * 1024)
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#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
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#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_CRC32_VERIFY
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