mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-08 13:53:21 +09:00
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
This commit is contained in:
commit
674ca84d11
@ -176,7 +176,7 @@ static void socfpga_nic301_slave_ns(void)
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static uint32_t iswgrp_handoff[8];
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static uint32_t iswgrp_handoff[8];
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int misc_init_r(void)
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int arch_early_init_r(void)
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{
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{
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int i;
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int i;
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for (i = 0; i < 8; i++) /* Cache initial SW setting regs */
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for (i = 0; i < 8; i++) /* Cache initial SW setting regs */
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@ -42,13 +42,4 @@ SECTIONS
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. = ALIGN(4);
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. = ALIGN(4);
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__bss_end = .;
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__bss_end = .;
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} >.sdram
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} >.sdram
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. = ALIGN(8);
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__malloc_start = .;
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. = . + CONFIG_SPL_MALLOC_SIZE;
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__malloc_end = .;
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. = . + CONFIG_SPL_STACK_SIZE;
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. = ALIGN(8);
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__stack_start = .;
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}
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}
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@ -1,15 +0,0 @@
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/*
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* Copyright (C) 2012 Pavel Machek <pavel@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SOCFPGA_SPL_H_
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#define _SOCFPGA_SPL_H_
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/* Symbols from linker script */
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extern char __malloc_start, __malloc_end, __stack_start;
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#define BOOT_DEVICE_RAM 1
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#endif
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@ -7,7 +7,7 @@
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#ifndef _ASM_SPL_H_
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#ifndef _ASM_SPL_H_
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#define _ASM_SPL_H_
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#define _ASM_SPL_H_
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#if defined(CONFIG_OMAP) || defined(CONFIG_SOCFPGA) \
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#if defined(CONFIG_OMAP) \
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|| defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
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|| defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
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|| defined(CONFIG_EXYNOS4210)
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|| defined(CONFIG_EXYNOS4210)
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/* Platform-specific defines */
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/* Platform-specific defines */
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@ -22,7 +22,7 @@
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MISC_INIT_R
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_CLOCKS
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#define CONFIG_CLOCKS
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@ -156,6 +156,21 @@
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BAUDRATE 115200
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/*
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_DWC2
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#define CONFIG_USB_STORAGE
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/*
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* NOTE: User must define either of the following to select which
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* of the two USB controllers available on SoCFPGA to use.
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* The DWC2 driver doesn't support multiple USB controllers.
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* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS
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* #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
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*/
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#endif
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/*
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/*
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* U-Boot environment
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* U-Boot environment
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*/
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*/
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@ -167,16 +182,21 @@
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/*
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/*
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* SPL
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* SPL
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*
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* SRAM Memory layout:
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*
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* 0xFFFF_0000 ...... Start of SRAM
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* 0xFFFF_xxxx ...... Top of stack (grows down)
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* 0xFFFF_yyyy ...... Malloc area
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* 0xFFFF_zzzz ...... Global Data
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* 0xFFFF_FF00 ...... End of SRAM
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*/
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*/
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_RAM_DEVICE
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#define CONFIG_SPL_RAM_DEVICE
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#define CONFIG_SPL_TEXT_BASE 0xFFFF0000
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#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SPL_STACK_SIZE (4 * 1024)
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#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024)
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#define CONFIG_SPL_MALLOC_SIZE (5 * 1024) /* FIXME */
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#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start))
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#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start)
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#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
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#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_CRC32_VERIFY
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@ -55,10 +55,8 @@
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#if defined(CONFIG_CMD_NET)
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#if defined(CONFIG_CMD_NET)
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#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
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#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
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#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
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#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
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#define CONFIG_EPHY0_PHY_ADDR 0
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/* PHY */
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/* PHY */
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#define CONFIG_EPHY1_PHY_ADDR 4
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#define CONFIG_PHY_MICREL
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#define CONFIG_PHY_MICREL
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#define CONFIG_PHY_MICREL_KSZ9021
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#define CONFIG_PHY_MICREL_KSZ9021
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#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
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#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
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@ -74,12 +74,12 @@ static uint16_t hdr_checksum(struct socfpga_header *header)
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static void build_header(uint8_t *buf, uint8_t version, uint8_t flags,
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static void build_header(uint8_t *buf, uint8_t version, uint8_t flags,
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uint16_t length_bytes)
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uint16_t length_bytes)
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{
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{
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header.validation = htole32(VALIDATION_WORD);
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header.validation = cpu_to_le32(VALIDATION_WORD);
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header.version = version;
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header.version = version;
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header.flags = flags;
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header.flags = flags;
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header.length_u32 = htole16(length_bytes/4);
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header.length_u32 = cpu_to_le16(length_bytes/4);
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header.zero = 0;
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header.zero = 0;
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header.checksum = htole16(hdr_checksum(&header));
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header.checksum = cpu_to_le16(hdr_checksum(&header));
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memcpy(buf, &header, sizeof(header));
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memcpy(buf, &header, sizeof(header));
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}
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}
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@ -92,12 +92,12 @@ static int verify_header(const uint8_t *buf)
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{
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{
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memcpy(&header, buf, sizeof(header));
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memcpy(&header, buf, sizeof(header));
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if (le32toh(header.validation) != VALIDATION_WORD)
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if (le32_to_cpu(header.validation) != VALIDATION_WORD)
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return -1;
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return -1;
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if (le16toh(header.checksum) != hdr_checksum(&header))
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if (le16_to_cpu(header.checksum) != hdr_checksum(&header))
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return -1;
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return -1;
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return le16toh(header.length_u32) * 4;
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return le16_to_cpu(header.length_u32) * 4;
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}
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}
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/* Sign the buffer and return the signed buffer size */
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/* Sign the buffer and return the signed buffer size */
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@ -116,7 +116,7 @@ static int sign_buffer(uint8_t *buf,
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/* Calculate and apply the CRC */
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/* Calculate and apply the CRC */
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calc_crc = ~pbl_crc32(0, (char *)buf, len);
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calc_crc = ~pbl_crc32(0, (char *)buf, len);
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*((uint32_t *)(buf + len)) = htole32(calc_crc);
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*((uint32_t *)(buf + len)) = cpu_to_le32(calc_crc);
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if (!pad_64k)
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if (!pad_64k)
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return len + 4;
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return len + 4;
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@ -150,7 +150,7 @@ static int verify_buffer(const uint8_t *buf)
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calc_crc = ~pbl_crc32(0, (const char *)buf, len);
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calc_crc = ~pbl_crc32(0, (const char *)buf, len);
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buf_crc = le32toh(*((uint32_t *)(buf + len)));
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buf_crc = le32_to_cpu(*((uint32_t *)(buf + len)));
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if (buf_crc != calc_crc) {
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if (buf_crc != calc_crc) {
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fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
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fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
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